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Differential D10723 Diff 28555 head/sys/dev/cesa/cesa.c

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head/sys/dev/cesa/cesa.c

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#include <sys/md5.h> #include <sys/md5.h>
#include <crypto/sha1.h> #include <crypto/sha1.h>
#include <crypto/sha2/sha256.h> #include <crypto/sha2/sha256.h>
#include <crypto/rijndael/rijndael.h> #include <crypto/rijndael/rijndael.h>
#include <opencrypto/cryptodev.h> #include <opencrypto/cryptodev.h>
#include "cryptodev_if.h" #include "cryptodev_if.h"
#include <arm/mv/mvreg.h> #include <arm/mv/mvreg.h>
#include <arm/mv/mvwin.h>
#include <arm/mv/mvvar.h> #include <arm/mv/mvvar.h>
#include "cesa.h" #include "cesa.h"
static int cesa_probe(device_t); static int cesa_probe(device_t);
static int cesa_attach(device_t); static int cesa_attach(device_t);
static int cesa_detach(device_t); static int cesa_detach(device_t);
static void cesa_intr(void *); static void cesa_intr(void *);
static int cesa_newsession(device_t, u_int32_t *, struct cryptoini *); static int cesa_newsession(device_t, u_int32_t *, struct cryptoini *);
static int cesa_freesession(device_t, u_int64_t); static int cesa_freesession(device_t, u_int64_t);
static int cesa_process(device_t, struct cryptop *, int); static int cesa_process(device_t, struct cryptop *, int);
static int decode_win_cesa_setup(struct cesa_softc *sc);
static struct resource_spec cesa_res_spec[] = { static struct resource_spec cesa_res_spec[] = {
{ SYS_RES_MEMORY, 0, RF_ACTIVE }, { SYS_RES_MEMORY, 0, RF_ACTIVE },
{ SYS_RES_MEMORY, 1, RF_ACTIVE }, { SYS_RES_MEMORY, 1, RF_ACTIVE },
{ SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE }, { SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE },
{ -1, 0 } { -1, 0 }
}; };
▲ Show 20 Lines • Show All 988 Lines • ▼ Show 20 Linescesa_attach(device_t dev)
/* Allocate I/O and IRQ resources */ /* Allocate I/O and IRQ resources */
error = bus_alloc_resources(dev, cesa_res_spec, sc->sc_res); error = bus_alloc_resources(dev, cesa_res_spec, sc->sc_res);
if (error) { if (error) {
device_printf(dev, "could not allocate resources\n"); device_printf(dev, "could not allocate resources\n");
goto err0; goto err0;
} }
/* Setup CESA decoding windows */
error = decode_win_cesa_setup(sc);
if (error) {
device_printf(dev, "could not setup decoding windows\n");
goto err1;
}
/* Acquire SRAM base address */ /* Acquire SRAM base address */
error = cesa_setup_sram(sc); error = cesa_setup_sram(sc);
if (error) { if (error) {
device_printf(dev, "could not setup SRAM\n"); device_printf(dev, "could not setup SRAM\n");
goto err1; goto err1;
} }
/* Setup interrupt handler */ /* Setup interrupt handler */
▲ Show 20 Lines • Show All 598 Lines • ▼ Show 20 Linescesa_process(device_t dev, struct cryptop *crp, int hint)
cesa_enqueue_request(sc, cr); cesa_enqueue_request(sc, cr);
/* Start execution, if we have no more requests in queue */ /* Start execution, if we have no more requests in queue */
if ((hint & CRYPTO_HINT_MORE) == 0) if ((hint & CRYPTO_HINT_MORE) == 0)
cesa_execute(sc); cesa_execute(sc);
return (0); return (0);
} }
/*
* Set CESA TDMA decode windows.
*/
static int
decode_win_cesa_setup(struct cesa_softc *sc)
{
struct mem_region availmem_regions[FDT_MEM_REGIONS];
int availmem_regions_sz;
uint32_t br, cr, i;
/* Grab physical memory regions information from DTS */
if (fdt_get_mem_regions(availmem_regions, &availmem_regions_sz,
NULL) != 0)
return (ENXIO);
if (availmem_regions_sz > MV_WIN_CESA_MAX) {
device_printf(sc->sc_dev, "Too much memory regions, cannot "
" set CESA windows to cover whole DRAM \n");
return (ENXIO);
}
/* Disable and clear all CESA windows */
for (i = 0; i < MV_WIN_CESA_MAX; i++) {
CESA_TDMA_WRITE(sc, MV_WIN_CESA_BASE(i), 0);
CESA_TDMA_WRITE(sc, MV_WIN_CESA_CTRL(i), 0);
}
/* Fill CESA TDMA decoding windows with information acquired from DTS */
for (i = 0; i < availmem_regions_sz; i++) {
br = availmem_regions[i].mr_start;
cr = availmem_regions[i].mr_size;
/* Don't add entries with size lower than 64KB */
if (cr & 0xffff0000) {
cr = (((cr - 1) & 0xffff0000) |
(MV_WIN_DDR_ATTR(i) << MV_WIN_CPU_ATTR_SHIFT) |
(MV_WIN_DDR_TARGET << MV_WIN_CPU_TARGET_SHIFT) |
MV_WIN_CPU_ENABLE_BIT);
CESA_TDMA_WRITE(sc, MV_WIN_CESA_BASE(i), br);
CESA_TDMA_WRITE(sc, MV_WIN_CESA_CTRL(i), cr);
}
}
return (0);
}