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sys/arm/mv/mvreg.h
Show First 20 Lines • Show All 418 Lines • ▼ Show 20 Lines | |||||
/* | /* | ||||
* SCU | * SCU | ||||
*/ | */ | ||||
#if defined(SOC_MV_ARMADA38X) | #if defined(SOC_MV_ARMADA38X) | ||||
#define MV_SCU_BASE (MV_BASE + 0xc000) | #define MV_SCU_BASE (MV_BASE + 0xc000) | ||||
#define MV_SCU_REGS_LEN 0x100 | #define MV_SCU_REGS_LEN 0x100 | ||||
#define MV_SCU_REG_CTRL 0x00 | #define MV_SCU_REG_CTRL 0x00 | ||||
#define MV_SCU_REG_CONFIG 0x04 | #define MV_SCU_REG_CONFIG 0x04 | ||||
#define MV_SCU_ENABLE 1 | #define MV_SCU_ENABLE (1 << 0) | ||||
#define MV_SCU_SL_L2_ENABLE (1 << 3) | |||||
#define SCU_CFG_REG_NCPU_MASK 0x3 | #define SCU_CFG_REG_NCPU_MASK 0x3 | ||||
#endif | #endif | ||||
/* | /* | ||||
* PMSU | * PMSU | ||||
*/ | */ | ||||
#if defined(SOC_MV_ARMADA38X) | #if defined(SOC_MV_ARMADA38X) | ||||
#define MV_PMSU_BASE (MV_BASE + 0x22000) | #define MV_PMSU_BASE (MV_BASE + 0x22000) | ||||
Show All 20 Lines |