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head/sys/dev/ixgbe/ixgbe_common.h
| /****************************************************************************** | /****************************************************************************** | ||||
| Copyright (c) 2001-2013, Intel Corporation | Copyright (c) 2001-2014, Intel Corporation | ||||
| All rights reserved. | All rights reserved. | ||||
| Redistribution and use in source and binary forms, with or without | Redistribution and use in source and binary forms, with or without | ||||
| Context not available. | |||||
| IXGBE_WRITE_REG(hw, reg, (u32) value); \ | IXGBE_WRITE_REG(hw, reg, (u32) value); \ | ||||
| IXGBE_WRITE_REG(hw, reg + 4, (u32) (value >> 32)); \ | IXGBE_WRITE_REG(hw, reg + 4, (u32) (value >> 32)); \ | ||||
| } while (0) | } while (0) | ||||
| #define IXGBE_REMOVED(a) (0) | |||||
| #if !defined(NO_READ_PBA_RAW) || !defined(NO_WRITE_PBA_RAW) | #if !defined(NO_READ_PBA_RAW) || !defined(NO_WRITE_PBA_RAW) | ||||
| struct ixgbe_pba { | struct ixgbe_pba { | ||||
| u16 word[2]; | u16 word[2]; | ||||
| Context not available. | |||||
| u16 *data); | u16 *data); | ||||
| s32 ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, | s32 ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, | ||||
| u16 words, u16 *data); | u16 words, u16 *data); | ||||
| u16 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw); | s32 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw); | ||||
| s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw, | s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw, | ||||
| u16 *checksum_val); | u16 *checksum_val); | ||||
| s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw); | s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw); | ||||
| Context not available. | |||||
| s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw); | s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw); | ||||
| bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw); | bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw); | ||||
| void ixgbe_fc_autoneg(struct ixgbe_hw *hw); | void ixgbe_fc_autoneg(struct ixgbe_hw *hw); | ||||
| s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw); | |||||
| s32 ixgbe_validate_mac_addr(u8 *mac_addr); | s32 ixgbe_validate_mac_addr(u8 *mac_addr); | ||||
| s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u16 mask); | s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask); | ||||
| void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u16 mask); | void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask); | ||||
| s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw); | s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw); | ||||
| s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *, u32 *reg_val); | |||||
| s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked); | |||||
| s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index); | s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index); | ||||
| s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index); | s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index); | ||||
| Context not available. | |||||
| u8 build, u8 ver); | u8 build, u8 ver); | ||||
| u8 ixgbe_calculate_checksum(u8 *buffer, u32 length); | u8 ixgbe_calculate_checksum(u8 *buffer, u32 length); | ||||
| s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer, | s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer, | ||||
| u32 length); | u32 length, u32 timeout, bool return_data); | ||||
| void ixgbe_clear_tx_pending(struct ixgbe_hw *hw); | void ixgbe_clear_tx_pending(struct ixgbe_hw *hw); | ||||
| extern s32 ixgbe_reset_pipeline_82599(struct ixgbe_hw *hw); | extern s32 ixgbe_reset_pipeline_82599(struct ixgbe_hw *hw); | ||||
| extern void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw); | extern void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw); | ||||
| bool ixgbe_mng_present(struct ixgbe_hw *hw); | |||||
| bool ixgbe_mng_enabled(struct ixgbe_hw *hw); | |||||
| void ixgbe_disable_rx_generic(struct ixgbe_hw *hw); | |||||
| void ixgbe_enable_rx_generic(struct ixgbe_hw *hw); | |||||
| s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw, | |||||
| ixgbe_link_speed speed, | |||||
| bool autoneg_wait_to_complete); | |||||
| void ixgbe_set_soft_rate_select_speed(struct ixgbe_hw *hw, | |||||
| ixgbe_link_speed speed); | |||||
| #endif /* IXGBE_COMMON */ | #endif /* IXGBE_COMMON */ | ||||
| Context not available. | |||||