Differential D9618 Diff 27088 sys/dev/altera/atse/if_atsereg.h

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sys/dev/altera/atse/if_atsereg.h

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	* SUCH DAMAGE.			* SUCH DAMAGE.
	*			*
	* $FreeBSD$			* $FreeBSD$
	*/			*/

	#ifndef _DEV_IF_ATSEREG_H			#ifndef _DEV_IF_ATSEREG_H
	#define _DEV_IF_ATSEREG_H			#define _DEV_IF_ATSEREG_H

				#include <dev/xdma/xdma.h>

	#define ATSE_VENDOR 0x6af7			#define ATSE_VENDOR 0x6af7
	#define ATSE_DEVICE 0x00bd			#define ATSE_DEVICE 0x00bd

	/* See hints file/fdt for ctrl port and Avalon FIFO addresses. */			/* See hints file/fdt for ctrl port and Avalon FIFO addresses. */

	/* Section 3. Parameter Settings. */			/* Section 3. Parameter Settings. */
	/*			/*
	* This is a lot of options that affect the way things are synthesized.			* This is a lot of options that affect the way things are synthesized.
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	/* XXX-BZ this is something a loader will have to handle for us. */			/* XXX-BZ this is something a loader will have to handle for us. */
	#define ALTERA_ETHERNET_OPTION_BITS_OFF 0x00008000			#define ALTERA_ETHERNET_OPTION_BITS_OFF 0x00008000
	#define ALTERA_ETHERNET_OPTION_BITS_LEN 0x00007fff			#define ALTERA_ETHERNET_OPTION_BITS_LEN 0x00007fff

	/* -------------------------------------------------------------------------- */			/* -------------------------------------------------------------------------- */

	struct atse_softc {			struct atse_softc {
	struct ifnet *atse_ifp;			struct ifnet *atse_ifp;
	struct mbuf *atse_rx_m;
	struct mbuf *atse_tx_m;
	uint8_t *atse_tx_buf;
	struct resource *atse_mem_res;			struct resource *atse_mem_res;
	struct resource *atse_rx_irq_res;
	struct resource *atse_rx_mem_res;
	struct resource *atse_rxc_mem_res;
	struct resource *atse_tx_irq_res;
	struct resource *atse_tx_mem_res;
	struct resource *atse_txc_mem_res;
	device_t atse_miibus;			device_t atse_miibus;
	device_t atse_dev;			device_t atse_dev;
	int atse_unit;			int atse_unit;
	int atse_mem_rid;			int atse_mem_rid;
	int atse_rx_irq_rid;
	int atse_rx_mem_rid;
	int atse_rxc_mem_rid;
	int atse_tx_irq_rid;
	int atse_tx_mem_rid;
	int atse_txc_mem_rid;
	int atse_phy_addr;			int atse_phy_addr;
	int atse_if_flags;			int atse_if_flags;
	int atse_rx_irq;
	int atse_tx_irq;
	u_long atse_rx_maddr;
	u_long atse_rx_msize;
	u_long atse_tx_maddr;
	u_long atse_tx_msize;
	u_long atse_rxc_maddr;
	u_long atse_rxc_msize;
	u_long atse_txc_maddr;
	u_long atse_txc_msize;
	void *atse_rx_intrhand;
	void *atse_tx_intrhand;
	bus_addr_t atse_bmcr0;			bus_addr_t atse_bmcr0;
	bus_addr_t atse_bmcr1;			bus_addr_t atse_bmcr1;
	uint32_t atse_flags;			uint32_t atse_flags;
	#define ATSE_FLAGS_LINK 0x00000001			#define ATSE_FLAGS_LINK 0x00000001
	#define ATSE_FLAGS_ERROR 0x00000002			#define ATSE_FLAGS_ERROR 0x00000002
	#define ATSE_FLAGS_SOP_SEEN 0x00000004			#define ATSE_FLAGS_SOP_SEEN 0x00000004
	uint8_t atse_eth_addr[ETHER_ADDR_LEN];			uint8_t atse_eth_addr[ETHER_ADDR_LEN];
	#define ATSE_ETH_ADDR_DEF 0x01			#define ATSE_ETH_ADDR_DEF 0x01
	#define ATSE_ETH_ADDR_SUPP1 0x02			#define ATSE_ETH_ADDR_SUPP1 0x02
	#define ATSE_ETH_ADDR_SUPP2 0x04			#define ATSE_ETH_ADDR_SUPP2 0x04
	#define ATSE_ETH_ADDR_SUPP3 0x08			#define ATSE_ETH_ADDR_SUPP3 0x08
	#define ATSE_ETH_ADDR_SUPP4 0x10			#define ATSE_ETH_ADDR_SUPP4 0x10
	#define ATSE_ETH_ADDR_ALL 0x1f			#define ATSE_ETH_ADDR_ALL 0x1f
	uint16_t atse_watchdog_timer;
	uint16_t atse_tx_m_offset;
	uint16_t atse_tx_buf_len;
	uint16_t atse_rx_buf_len;
	int16_t atse_rx_cycles; /* POLLING */			int16_t atse_rx_cycles; /* POLLING */
	#define RX_CYCLES_IN_INTR 5			#define RX_CYCLES_IN_INTR 5
	uint32_t atse_rx_err[6];			uint32_t atse_rx_err[6];
	#define ATSE_RX_ERR_FIFO_THRES_EOP 0 /* FIFO threshold reached, on EOP. */			#define ATSE_RX_ERR_FIFO_THRES_EOP 0 /* FIFO threshold reached, on EOP. */
	#define ATSE_RX_ERR_ELEN 1 /* Frame/payload length not valid. */			#define ATSE_RX_ERR_ELEN 1 /* Frame/payload length not valid. */
	#define ATSE_RX_ERR_CRC32 2 /* CRC-32 error. */			#define ATSE_RX_ERR_CRC32 2 /* CRC-32 error. */
	#define ATSE_RX_ERR_FIFO_THRES_TRUNC 3 /* FIFO thresh., truncated frame. */			#define ATSE_RX_ERR_FIFO_THRES_TRUNC 3 /* FIFO thresh., truncated frame. */
	#define ATSE_RX_ERR_4 4 /* ? */			#define ATSE_RX_ERR_4 4 /* ? */
	#define ATSE_RX_ERR_5 5 /* / */			#define ATSE_RX_ERR_5 5 /* / */
	#define ATSE_RX_ERR_MAX 6			#define ATSE_RX_ERR_MAX 6
	struct callout atse_tick;			struct callout atse_tick;
	struct mtx atse_mtx;			struct mtx atse_mtx;
				device_t dev;

				/* xDMA */
				xdma_controller_t *xdma_tx;
				xdma_channel_t *xchan_tx;
				void *ih_tx;
				int txcount;

				xdma_controller_t *xdma_rx;
				xdma_channel_t *xchan_rx;
				void *ih_rx;

				struct buf_ring *br;
				struct mtx br_mtx;
	};			};


	int atse_attach(device_t);			int atse_attach(device_t);
	int atse_detach_dev(device_t);			int atse_detach_dev(device_t);
	void atse_detach_resources(device_t);			void atse_detach_resources(device_t);

	int atse_miibus_readreg(device_t, int, int);			int atse_miibus_readreg(device_t, int, int);
	int atse_miibus_writereg(device_t, int, int, int);			int atse_miibus_writereg(device_t, int, int, int);
	void atse_miibus_statchg(device_t);			void atse_miibus_statchg(device_t);

	extern devclass_t atse_devclass;			extern devclass_t atse_devclass;

	#endif /* _DEV_IF_ATSEREG_H */			#endif /* _DEV_IF_ATSEREG_H */

	/* end */