Differential D10045 Diff 26411 sys/arm/arm/hypervisor-stub.S

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sys/arm/arm/hypervisor-stub.S

Property	Old Value	New Value
svn:eol-style	null	native \ No newline at end of property
svn:keywords	null	FreeBSD=%H \ No newline at end of property
svn:mime-type	null	text/plain \ No newline at end of property

				/*
				* Copyright (C) 2015 Mihai Carabas <mihai.carabas@gmail.com>
				andrewUnsubmitted Not Done Inline Actions You should add a license. andrew: You should add a license.
				* All rights reserved.
				*
				* Redistribution and use in source and binary forms, with or without
				* modification, are permitted provided that the following conditions
				* are met:
				* 1. Redistributions of source code must retain the above copyright
				* notice, this list of conditions and the following disclaimer.
				andrewUnsubmitted Not Done Inline Actions You should add `__FBSDID("$FreeBSD$");` here, and wrap the code with `#if __ARM_ARCH >= 7` andrew: You should add `__FBSDID("$FreeBSD$");` here, and wrap the code with `#if __ARM_ARCH >= 7`
				* 2. Redistributions in binary form must reproduce the above copyright
				* notice, this list of conditions and the following disclaimer in the
				* documentation and/or other materials provided with the distribution.
				*
				* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
				* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
				* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
				* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
				* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
				* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
				* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
				* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
				andrewUnsubmitted Not Done Inline Actions Can you add these (and other registers below) to `sys/arm/include/sysreg.h` then use the macros here. andrew: Can you add these (and other registers below) to `sys/arm/include/sysreg.h` then use the macros…
				* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
				* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
				* SUCH DAMAGE.
				*/
				andrewUnsubmitted Not Done Inline Actions You should add a macro to `sys/arm/include/armreg.h` for this. andrew: You should add a macro to `sys/arm/include/armreg.h` for this.

				#include "assym.s"
				#include <sys/syscall.h>
				#include <machine/asm.h>
				#include <machine/asmacros.h>
				#include <machine/armreg.h>

				__FBSDID("$FreeBSD$");

				#if __ARM_ARCH >= 7
				#if defined(__ARM_ARCH_7VE__) \|\| defined(__clang__)
				.arch_extension virt
				#endif

				ASENTRY_NP(hypervisor_stub_vect_install)

				/* Install hypervisor stub vectors. */
				adr r0, hypervisor_stub_vect
				mcr CP15_HVBAR(r0) @ set HVBAR

				/* Disable all the traps in the hypervisor. */
				mov r0, #0
				mcr CP15_HCR(r0) @ HCR
				mcr CP15_HCPTR(r0) @ HCPTR
				mcr CP15_HSTR(r0) @ HSTR
				mcr CP15_HSCTLR(r0) @ HSCTLR
				andrewUnsubmitted Not Done Inline Actions Do we need these comments now? It should be obvious what register each instruction is updating. andrew: Do we need these comments now? It should be obvious what register each instruction is updating.

				/* Don't disable access to perf-mon from PL0,1 */
				mrc CP15_HDCR(r0) @ HDCR
				and r0, #(ARM_CP15_HDCR_HPMN) @ Preserve HPMN
				andrewUnsubmitted Not Done Inline Actions Can you change this comment to `/* ... /` andrew:* Can you change this comment to `/* ... */`
				mcr CP15_HDCR(r0) @ HDCR

				andrewUnsubmitted Not Done Inline Actions Maybe a comment saying there is an implicit instruction barrier in the `eret` in the caller. andrew: Maybe a comment saying there is an implicit instruction barrier in the `eret` in the caller.
				mov pc, lr
				andrewUnsubmitted Not Done Inline Actions This one can be `RET` andrew: This one can be `RET`
				END(hypervisor_stub_vect_install)

				ASENTRY_NP(hypervisor_stub_trap)
				/*
				* If the first parameter is -1 than return the
				* exception vector (HVBAR), otherwise set it to
				* the value of it.
				*/
				cmp r0, #-1
				mrceq CP15_HVBAR(r0) @ get HVBAR
				mcrne CP15_HVBAR(r0) @ set HVBAR
				ERET
				END(hypervisor_stub_trap)

				.globl hypervisor_stub_vect
				.align 5
				_C_LABEL(hypervisor_stub_vect):
				.word 0 /* Reset */
				.word 0 /* undev */
				.word 0 /* SMC */
				.word 0 /* PABT */
				.word 0 /* DABT */
				b hypervisor_stub_trap /* HYP-Mode */
				.word 0 /* FIQ */
				.word 0 /* IRQ */
				#endif /* __ARM_ARCH >= 7 */