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sys/dev/ixgbe/ixgbe.h
Show First 20 Lines • Show All 53 Lines • ▼ Show 20 Lines | |||||
#include <net/if.h> | #include <net/if.h> | ||||
#include <net/if_var.h> | #include <net/if_var.h> | ||||
#include <net/if_arp.h> | #include <net/if_arp.h> | ||||
#include <net/bpf.h> | #include <net/bpf.h> | ||||
#include <net/ethernet.h> | #include <net/ethernet.h> | ||||
#include <net/if_dl.h> | #include <net/if_dl.h> | ||||
#include <net/if_media.h> | #include <net/if_media.h> | ||||
#include <net/bpf.h> | |||||
#include <net/if_types.h> | #include <net/if_types.h> | ||||
#include <net/if_vlan_var.h> | #include <net/if_vlan_var.h> | ||||
#include <net/iflib.h> | |||||
#include <netinet/in_systm.h> | #include <netinet/in_systm.h> | ||||
#include <netinet/in.h> | #include <netinet/in.h> | ||||
#include <netinet/if_ether.h> | #include <netinet/if_ether.h> | ||||
#include <netinet/ip.h> | |||||
#include <netinet/ip6.h> | |||||
#include <netinet/tcp.h> | |||||
#include <netinet/tcp_lro.h> | |||||
#include <netinet/udp.h> | |||||
#include <machine/in_cksum.h> | |||||
#include <sys/bus.h> | #include <sys/bus.h> | ||||
#include <machine/bus.h> | #include <machine/bus.h> | ||||
#include <sys/rman.h> | #include <sys/rman.h> | ||||
#include <machine/resource.h> | #include <machine/resource.h> | ||||
#include <vm/vm.h> | #include <vm/vm.h> | ||||
#include <vm/pmap.h> | #include <vm/pmap.h> | ||||
#include <machine/clock.h> | #include <machine/clock.h> | ||||
#include <dev/pci/pcivar.h> | #include <dev/pci/pcivar.h> | ||||
#include <dev/pci/pcireg.h> | #include <dev/pci/pcireg.h> | ||||
#include <sys/proc.h> | #include <sys/proc.h> | ||||
#include <sys/sysctl.h> | #include <sys/sysctl.h> | ||||
#include <sys/endian.h> | #include <sys/endian.h> | ||||
#include <sys/taskqueue.h> | #include <sys/gtaskqueue.h> | ||||
#include <sys/pcpu.h> | #include <sys/pcpu.h> | ||||
#include <sys/smp.h> | #include <sys/smp.h> | ||||
#include <machine/smp.h> | #include <machine/smp.h> | ||||
#include <sys/sbuf.h> | #include <sys/sbuf.h> | ||||
#ifdef PCI_IOV | #ifdef PCI_IOV | ||||
#include <sys/nv.h> | #include <sys/nv.h> | ||||
#include <sys/iov_schema.h> | #include <sys/iov_schema.h> | ||||
▲ Show 20 Lines • Show All 201 Lines • ▼ Show 20 Lines | typedef struct _ixgbe_vendor_info_t { | ||||
unsigned int device_id; | unsigned int device_id; | ||||
unsigned int subvendor_id; | unsigned int subvendor_id; | ||||
unsigned int subdevice_id; | unsigned int subdevice_id; | ||||
unsigned int index; | unsigned int index; | ||||
} ixgbe_vendor_info_t; | } ixgbe_vendor_info_t; | ||||
struct ixgbe_tx_buf { | struct ixgbe_tx_buf { | ||||
union ixgbe_adv_tx_desc *eop; | int eop; | ||||
struct mbuf *m_head; | |||||
bus_dmamap_t map; | |||||
}; | }; | ||||
struct ixgbe_rx_buf { | |||||
struct mbuf *buf; | |||||
struct mbuf *fmp; | |||||
bus_dmamap_t pmap; | |||||
u_int flags; | |||||
#define IXGBE_RX_COPY 0x01 | |||||
uint64_t addr; | |||||
}; | |||||
/* | /* | ||||
* Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free. | * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free. | ||||
*/ | */ | ||||
struct ixgbe_dma_alloc { | struct ixgbe_dma_alloc { | ||||
bus_addr_t dma_paddr; | bus_addr_t dma_paddr; | ||||
caddr_t dma_vaddr; | caddr_t dma_vaddr; | ||||
bus_dma_tag_t dma_tag; | bus_dma_tag_t dma_tag; | ||||
bus_dmamap_t dma_map; | bus_dmamap_t dma_map; | ||||
bus_dma_segment_t dma_seg; | bus_dma_segment_t dma_seg; | ||||
bus_size_t dma_size; | bus_size_t dma_size; | ||||
int dma_nseg; | int dma_nseg; | ||||
}; | }; | ||||
struct ixgbe_mc_addr { | struct ixgbe_mc_addr { | ||||
u8 addr[IXGBE_ETH_LENGTH_OF_ADDRESS]; | u8 addr[IXGBE_ETH_LENGTH_OF_ADDRESS]; | ||||
u32 vmdq; | u32 vmdq; | ||||
}; | }; | ||||
/* | /* | ||||
** Driver queue struct: this is the interrupt container | |||||
** for the associated tx and rx ring. | |||||
*/ | |||||
struct ix_queue { | |||||
struct adapter *adapter; | |||||
u32 msix; /* This queue's MSIX vector */ | |||||
u32 eims; /* This queue's EIMS bit */ | |||||
u32 eitr_setting; | |||||
u32 me; | |||||
struct resource *res; | |||||
void *tag; | |||||
int busy; | |||||
struct tx_ring *txr; | |||||
struct rx_ring *rxr; | |||||
struct task que_task; | |||||
struct taskqueue *tq; | |||||
u64 irqs; | |||||
}; | |||||
/* | |||||
* The transmit ring, one per queue | * The transmit ring, one per queue | ||||
*/ | */ | ||||
struct tx_ring { | struct tx_ring { | ||||
struct ix_tx_queue *que; | |||||
struct adapter *adapter; | struct adapter *adapter; | ||||
struct mtx tx_mtx; | |||||
u32 me; | u32 me; | ||||
u32 tail; | u32 tail; | ||||
int busy; | int busy; | ||||
union ixgbe_adv_tx_desc *tx_base; | union ixgbe_adv_tx_desc *tx_base; | ||||
struct ixgbe_tx_buf *tx_buffers; | struct ixgbe_tx_buf *tx_buffers; | ||||
struct ixgbe_dma_alloc txdma; | uint64_t tx_paddr; | ||||
volatile u16 tx_avail; | |||||
u16 next_avail_desc; | |||||
u16 next_to_clean; | |||||
u16 num_desc; | |||||
u32 txd_cmd; | |||||
bus_dma_tag_t txtag; | |||||
char mtx_name[16]; | |||||
#ifndef IXGBE_LEGACY_TX | |||||
struct buf_ring *br; | |||||
struct task txq_task; | |||||
#endif | |||||
#ifdef IXGBE_FDIR | #ifdef IXGBE_FDIR | ||||
u16 atr_sample; | u16 atr_sample; | ||||
u16 atr_count; | u16 atr_count; | ||||
#endif | #endif | ||||
u32 bytes; /* used for AIM */ | u32 bytes; /* used for AIM */ | ||||
u32 packets; | u32 packets; | ||||
/* Soft Stats */ | /* Soft Stats */ | ||||
unsigned long tso_tx; | unsigned long tso_tx; | ||||
unsigned long no_tx_map_avail; | |||||
unsigned long no_tx_dma_setup; | |||||
u64 no_desc_avail; | |||||
u64 total_packets; | u64 total_packets; | ||||
}; | }; | ||||
/* | /* | ||||
* The Receive ring, one per rx queue | * The Receive ring, one per rx queue | ||||
*/ | */ | ||||
struct rx_ring { | struct rx_ring { | ||||
struct ix_rx_queue *que; | |||||
struct adapter *adapter; | struct adapter *adapter; | ||||
struct mtx rx_mtx; | |||||
u32 me; | u32 me; | ||||
u32 tail; | u32 tail; | ||||
union ixgbe_adv_rx_desc *rx_base; | union ixgbe_adv_rx_desc *rx_base; | ||||
struct ixgbe_dma_alloc rxdma; | uint64_t rx_paddr; | ||||
struct lro_ctrl lro; | |||||
bool lro_enabled; | |||||
bool hw_rsc; | bool hw_rsc; | ||||
bool vtag_strip; | bool vtag_strip; | ||||
u16 next_to_refresh; | |||||
u16 next_to_check; | |||||
u16 num_desc; | |||||
u16 mbuf_sz; | |||||
char mtx_name[16]; | |||||
struct ixgbe_rx_buf *rx_buffers; | |||||
bus_dma_tag_t ptag; | bus_dma_tag_t ptag; | ||||
u32 bytes; /* Used for AIM calc */ | u32 bytes; /* Used for AIM calc */ | ||||
u32 packets; | u32 packets; | ||||
/* Soft stats */ | /* Soft stats */ | ||||
u64 rx_irq; | u64 rx_irq; | ||||
u64 rx_copies; | u64 rx_copies; | ||||
u64 rx_packets; | u64 rx_packets; | ||||
u64 rx_bytes; | u64 rx_bytes; | ||||
u64 rx_discarded; | u64 rx_discarded; | ||||
u64 rsc_num; | u64 rsc_num; | ||||
#ifdef IXGBE_FDIR | #ifdef IXGBE_FDIR | ||||
u64 flm; | u64 flm; | ||||
#endif | #endif | ||||
}; | }; | ||||
/* | |||||
** Driver queue struct: this is the interrupt container | |||||
** for the associated tx and rx ring. | |||||
*/ | |||||
struct ix_rx_queue { | |||||
struct adapter *adapter; | |||||
u32 msix; /* This queue's MSIX vector */ | |||||
u32 eims; /* This queue's EIMS bit */ | |||||
u32 eitr_setting; | |||||
struct resource *res; | |||||
void *tag; | |||||
int busy; | |||||
struct rx_ring rxr; | |||||
struct if_irq que_irq; | |||||
u64 irqs; | |||||
}; | |||||
struct ix_tx_queue { | |||||
struct adapter *adapter; | |||||
u32 msix; /* This queue's MSIX vector */ | |||||
struct tx_ring txr; | |||||
}; | |||||
#ifdef PCI_IOV | #ifdef PCI_IOV | ||||
#define IXGBE_VF_CTS (1 << 0) /* VF is clear to send. */ | #define IXGBE_VF_CTS (1 << 0) /* VF is clear to send. */ | ||||
#define IXGBE_VF_CAP_MAC (1 << 1) /* VF is permitted to change MAC. */ | #define IXGBE_VF_CAP_MAC (1 << 1) /* VF is permitted to change MAC. */ | ||||
#define IXGBE_VF_CAP_VLAN (1 << 2) /* VF is permitted to join vlans. */ | #define IXGBE_VF_CAP_VLAN (1 << 2) /* VF is permitted to join vlans. */ | ||||
#define IXGBE_VF_ACTIVE (1 << 3) /* VF is active. */ | #define IXGBE_VF_ACTIVE (1 << 3) /* VF is active. */ | ||||
#define IXGBE_MAX_VF_MC 30 /* Max number of multicast entries */ | #define IXGBE_MAX_VF_MC 30 /* Max number of multicast entries */ | ||||
struct ixgbe_vf { | struct ixgbe_vf { | ||||
u_int pool; | u_int pool; | ||||
u_int rar_index; | u_int rar_index; | ||||
u_int max_frame_size; | u_int maximum_frame_size; | ||||
uint32_t flags; | uint32_t flags; | ||||
uint8_t ether_addr[ETHER_ADDR_LEN]; | uint8_t ether_addr[ETHER_ADDR_LEN]; | ||||
uint16_t mc_hash[IXGBE_MAX_VF_MC]; | uint16_t mc_hash[IXGBE_MAX_VF_MC]; | ||||
uint16_t num_mc_hashes; | uint16_t num_mc_hashes; | ||||
uint16_t default_vlan; | uint16_t default_vlan; | ||||
uint16_t vlan_tag; | uint16_t vlan_tag; | ||||
uint16_t api_ver; | uint16_t api_ver; | ||||
}; | }; | ||||
#endif /* PCI_IOV */ | #endif /* PCI_IOV */ | ||||
/* Our adapter structure */ | /* Our adapter structure */ | ||||
struct adapter { | struct adapter { | ||||
/* much of the code assumes this is first :< */ | |||||
struct ixgbe_hw hw; | struct ixgbe_hw hw; | ||||
struct ixgbe_osdep osdep; | struct ixgbe_osdep osdep; | ||||
if_ctx_t ctx; | |||||
device_t dev; | if_softc_ctx_t shared; | ||||
#define num_tx_queues shared->isc_ntxqsets | |||||
#define num_rx_queues shared->isc_nrxqsets | |||||
#define max_frame_size shared->isc_max_frame_size | |||||
#define intr_type shared->isc_intr | |||||
struct ifnet *ifp; | struct ifnet *ifp; | ||||
struct device *dev; | |||||
struct resource *pci_mem; | struct resource *pci_mem; | ||||
struct resource *msix_mem; | |||||
/* | /* | ||||
* Interrupt resources: this set is | * Interrupt resources: this set is | ||||
* either used for legacy, or for Link | * either used for legacy, or for Link | ||||
* when doing MSIX | * when doing MSIX | ||||
*/ | */ | ||||
struct if_irq irq; | |||||
void *tag; | void *tag; | ||||
struct resource *res; | struct resource *res; | ||||
struct ifmedia media; | struct ifmedia *media; | ||||
struct callout timer; | |||||
int msix; | int msix; | ||||
int if_flags; | int if_flags; | ||||
struct mtx core_mtx; | |||||
eventhandler_tag vlan_attach; | |||||
eventhandler_tag vlan_detach; | |||||
u16 num_vlans; | u16 num_vlans; | ||||
u16 num_queues; | |||||
/* | /* | ||||
** Shadow VFTA table, this is needed because | ** Shadow VFTA table, this is needed because | ||||
** the real vlan filter table gets cleared during | ** the real vlan filter table gets cleared during | ||||
** a soft reset and the driver needs to be able | ** a soft reset and the driver needs to be able | ||||
** to repopulate it. | ** to repopulate it. | ||||
*/ | */ | ||||
u32 shadow_vfta[IXGBE_VFTA_SIZE]; | u32 shadow_vfta[IXGBE_VFTA_SIZE]; | ||||
/* Info about the interface */ | /* Info about the interface */ | ||||
u32 optics; | u32 optics; | ||||
u32 fc; /* local flow ctrl setting */ | u32 fc; /* local flow ctrl setting */ | ||||
int advertise; /* link speeds */ | int advertise; /* link speeds */ | ||||
bool enable_aim; /* adaptive interrupt moderation */ | bool enable_aim; /* adaptive interrupt moderation */ | ||||
bool link_active; | bool link_active; | ||||
u16 max_frame_size; | |||||
u16 num_segs; | u16 num_segs; | ||||
u32 link_speed; | u32 link_speed; | ||||
bool link_up; | bool link_up; | ||||
u32 vector; | u32 vector; | ||||
u16 dmac; | u16 dmac; | ||||
bool eee_enabled; | bool eee_enabled; | ||||
u32 phy_layer; | u32 phy_layer; | ||||
/* Power management-related */ | /* Power management-related */ | ||||
bool wol_support; | bool wol_support; | ||||
u32 wufc; | u32 wufc; | ||||
/* Mbuf cluster size */ | |||||
u32 rx_mbuf_sz; | |||||
/* Support for pluggable optics */ | /* Support for pluggable optics */ | ||||
bool sfp_probe; | bool sfp_probe; | ||||
struct task link_task; /* Link tasklet */ | |||||
struct task mod_task; /* SFP tasklet */ | struct grouptask mod_task; /* SFP tasklet */ | ||||
struct task msf_task; /* Multispeed Fiber */ | struct grouptask msf_task; /* Multispeed Fiber */ | ||||
#ifdef PCI_IOV | #ifdef PCI_IOV | ||||
struct task mbx_task; /* VF -> PF mailbox interrupt */ | struct grouptask mbx_task; /* VF -> PF mailbox interrupt */ | ||||
#endif /* PCI_IOV */ | #endif /* PCI_IOV */ | ||||
#ifdef IXGBE_FDIR | #ifdef IXGBE_FDIR | ||||
int fdir_reinit; | int fdir_reinit; | ||||
struct task fdir_task; | struct grouptask fdir_task; | ||||
#endif | #endif | ||||
struct task phy_task; /* PHY intr tasklet */ | |||||
struct taskqueue *tq; | |||||
struct grouptask phy_task; /* PHY intr tasklet */ | |||||
/* | /* | ||||
** Queues: | ** Queues: | ||||
** This is the irq holder, it has | ** This is the irq holder, it has | ||||
** and RX/TX pair or rings associated | ** and RX/TX pair or rings associated | ||||
** with it. | ** with it. | ||||
*/ | */ | ||||
struct ix_queue *queues; | struct ix_tx_queue *tx_queues; | ||||
struct ix_rx_queue *rx_queues; | |||||
u64 active_queues; | |||||
/* | |||||
* Transmit rings: | |||||
* Allocated at run time, an array of rings. | |||||
*/ | |||||
struct tx_ring *tx_rings; | |||||
u32 num_tx_desc; | |||||
u32 tx_process_limit; | u32 tx_process_limit; | ||||
/* | |||||
* Receive rings: | |||||
* Allocated at run time, an array of rings. | |||||
*/ | |||||
struct rx_ring *rx_rings; | |||||
u64 active_queues; | |||||
u32 num_rx_desc; | |||||
u32 rx_process_limit; | u32 rx_process_limit; | ||||
/* Multicast array memory */ | /* Multicast array memory */ | ||||
struct ixgbe_mc_addr *mta; | struct ixgbe_mc_addr *mta; | ||||
int num_vfs; | int num_vfs; | ||||
int pool; | int pool; | ||||
#ifdef PCI_IOV | #ifdef PCI_IOV | ||||
struct ixgbe_vf *vfs; | struct ixgbe_vf *vfs; | ||||
#endif | #endif | ||||
#ifdef DEV_NETMAP | #ifdef DEV_NETMAP | ||||
void (*init_locked)(struct adapter *); | void (*init_locked)(struct adapter *); | ||||
void (*stop_locked)(void *); | void (*stop_locked)(void *); | ||||
#endif | #endif | ||||
/* Misc stats maintained by the driver */ | /* Misc stats maintained by the driver */ | ||||
unsigned long dropped_pkts; | unsigned long rx_mbuf_sz; | ||||
unsigned long mbuf_defrag_failed; | |||||
unsigned long mbuf_header_failed; | unsigned long mbuf_header_failed; | ||||
unsigned long mbuf_packet_failed; | unsigned long mbuf_packet_failed; | ||||
unsigned long watchdog_events; | unsigned long watchdog_events; | ||||
unsigned long link_irq; | unsigned long link_irq; | ||||
union { | union { | ||||
struct ixgbe_hw_stats pf; | struct ixgbe_hw_stats pf; | ||||
struct ixgbevf_hw_stats vf; | struct ixgbevf_hw_stats vf; | ||||
} stats; | } stats; | ||||
#if __FreeBSD_version >= 1100036 | #if __FreeBSD_version >= 1100036 | ||||
/* counter(9) stats */ | /* counter(9) stats */ | ||||
u64 ipackets; | u64 ipackets; | ||||
u64 ierrors; | u64 ierrors; | ||||
u64 opackets; | u64 opackets; | ||||
u64 oerrors; | u64 oerrors; | ||||
u64 ibytes; | u64 ibytes; | ||||
u64 obytes; | u64 obytes; | ||||
u64 imcasts; | u64 imcasts; | ||||
u64 omcasts; | u64 omcasts; | ||||
u64 iqdrops; | u64 iqdrops; | ||||
u64 noproto; | u64 noproto; | ||||
#endif | #endif | ||||
}; | }; | ||||
/* Precision Time Sync (IEEE 1588) defines */ | /* Precision Time Sync (IEEE 1588) defines */ | ||||
#define ETHERTYPE_IEEE1588 0x88F7 | #define ETHERTYPE_IEEE1588 0x88F7 | ||||
#define PICOSECS_PER_TICK 20833 | #define PICOSECS_PER_TICK 20833 | ||||
#define TSYNC_UDP_PORT 319 /* UDP port for the protocol */ | #define TSYNC_UDP_PORT 319 /* UDP port for the protocol */ | ||||
#define IXGBE_ADVTXD_TSTAMP 0x00080000 | #define IXGBE_ADVTXD_TSTAMP 0x00080000 | ||||
#define IXGBE_CORE_LOCK_INIT(_sc, _name) \ | |||||
mtx_init(&(_sc)->core_mtx, _name, "IXGBE Core Lock", MTX_DEF) | |||||
#define IXGBE_CORE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->core_mtx) | |||||
#define IXGBE_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->tx_mtx) | |||||
#define IXGBE_RX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->rx_mtx) | |||||
#define IXGBE_CORE_LOCK(_sc) mtx_lock(&(_sc)->core_mtx) | |||||
#define IXGBE_TX_LOCK(_sc) mtx_lock(&(_sc)->tx_mtx) | |||||
#define IXGBE_TX_TRYLOCK(_sc) mtx_trylock(&(_sc)->tx_mtx) | |||||
#define IXGBE_RX_LOCK(_sc) mtx_lock(&(_sc)->rx_mtx) | |||||
#define IXGBE_CORE_UNLOCK(_sc) mtx_unlock(&(_sc)->core_mtx) | |||||
#define IXGBE_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->tx_mtx) | |||||
#define IXGBE_RX_UNLOCK(_sc) mtx_unlock(&(_sc)->rx_mtx) | |||||
#define IXGBE_CORE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->core_mtx, MA_OWNED) | |||||
#define IXGBE_TX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->tx_mtx, MA_OWNED) | |||||
/* For backward compatibility */ | /* For backward compatibility */ | ||||
#if !defined(PCIER_LINK_STA) | #if !defined(PCIER_LINK_STA) | ||||
#define PCIER_LINK_STA PCIR_EXPRESS_LINK_STA | #define PCIER_LINK_STA PCIR_EXPRESS_LINK_STA | ||||
#endif | #endif | ||||
/* Stats macros */ | /* Stats macros */ | ||||
#if __FreeBSD_version >= 1100036 | #if __FreeBSD_version >= 1100036 | ||||
#define IXGBE_SET_IPACKETS(sc, count) (sc)->ipackets = (count) | #define IXGBE_SET_IPACKETS(sc, count) (sc)->ipackets = (count) | ||||
▲ Show 20 Lines • Show All 67 Lines • ▼ Show 20 Lines | #ifdef ALTQ | ||||
if (ALTQ_IS_ENABLED(&ifp->if_snd)) | if (ALTQ_IS_ENABLED(&ifp->if_snd)) | ||||
return (1); | return (1); | ||||
#endif | #endif | ||||
return (!buf_ring_empty(br)); | return (!buf_ring_empty(br)); | ||||
} | } | ||||
#endif | #endif | ||||
/* | /* | ||||
** Find the number of unrefreshed RX descriptors | |||||
*/ | |||||
static inline u16 | |||||
ixgbe_rx_unrefreshed(struct rx_ring *rxr) | |||||
{ | |||||
if (rxr->next_to_check > rxr->next_to_refresh) | |||||
return (rxr->next_to_check - rxr->next_to_refresh - 1); | |||||
else | |||||
return ((rxr->num_desc + rxr->next_to_check) - | |||||
rxr->next_to_refresh - 1); | |||||
} | |||||
/* | |||||
** This checks for a zero mac addr, something that will be likely | ** This checks for a zero mac addr, something that will be likely | ||||
** unless the Admin on the Host has created one. | ** unless the Admin on the Host has created one. | ||||
*/ | */ | ||||
static inline bool | static inline bool | ||||
ixv_check_ether_addr(u8 *addr) | ixv_check_ether_addr(u8 *addr) | ||||
{ | { | ||||
bool status = TRUE; | bool status = TRUE; | ||||
if ((addr[0] == 0 && addr[1]== 0 && addr[2] == 0 && | if ((addr[0] == 0 && addr[1]== 0 && addr[2] == 0 && | ||||
addr[3] == 0 && addr[4]== 0 && addr[5] == 0)) | addr[3] == 0 && addr[4]== 0 && addr[5] == 0)) | ||||
status = FALSE; | status = FALSE; | ||||
return (status); | return (status); | ||||
} | } | ||||
/* Shared Prototypes */ | /* Shared Prototypes */ | ||||
#ifdef IXGBE_LEGACY_TX | |||||
void ixgbe_start(struct ifnet *); | |||||
void ixgbe_start_locked(struct tx_ring *, struct ifnet *); | |||||
#else /* ! IXGBE_LEGACY_TX */ | |||||
int ixgbe_mq_start(struct ifnet *, struct mbuf *); | |||||
int ixgbe_mq_start_locked(struct ifnet *, struct tx_ring *); | |||||
void ixgbe_qflush(struct ifnet *); | |||||
void ixgbe_deferred_mq_start(void *, int); | |||||
#endif /* IXGBE_LEGACY_TX */ | |||||
int ixgbe_allocate_queues(struct adapter *); | int ixgbe_allocate_queues(struct adapter *); | ||||
int ixgbe_allocate_transmit_buffers(struct tx_ring *); | int ixgbe_allocate_transmit_buffers(struct tx_ring *); | ||||
int ixgbe_setup_transmit_structures(struct adapter *); | int ixgbe_setup_transmit_structures(struct adapter *); | ||||
void ixgbe_free_transmit_structures(struct adapter *); | void ixgbe_free_transmit_structures(struct adapter *); | ||||
int ixgbe_allocate_receive_buffers(struct rx_ring *); | int ixgbe_allocate_receive_buffers(struct rx_ring *); | ||||
int ixgbe_setup_receive_structures(struct adapter *); | int ixgbe_setup_receive_structures(struct adapter *); | ||||
void ixgbe_free_receive_structures(struct adapter *); | void ixgbe_free_receive_structures(struct adapter *); | ||||
void ixgbe_txeof(struct tx_ring *); | |||||
bool ixgbe_rxeof(struct ix_queue *); | |||||
int ixgbe_dma_malloc(struct adapter *, | int ixgbe_dma_malloc(struct adapter *, | ||||
bus_size_t, struct ixgbe_dma_alloc *, int); | bus_size_t, struct ixgbe_dma_alloc *, int); | ||||
void ixgbe_dma_free(struct adapter *, struct ixgbe_dma_alloc *); | void ixgbe_dma_free(struct adapter *, struct ixgbe_dma_alloc *); | ||||
int ixgbe_get_regs(SYSCTL_HANDLER_ARGS); | |||||
void ixgbe_init_tx_ring(struct ix_tx_queue *que); | |||||
#ifdef PCI_IOV | #ifdef PCI_IOV | ||||
static inline boolean_t | static inline boolean_t | ||||
ixgbe_vf_mac_changed(struct ixgbe_vf *vf, const uint8_t *mac) | ixgbe_vf_mac_changed(struct ixgbe_vf *vf, const uint8_t *mac) | ||||
{ | { | ||||
return (bcmp(mac, vf->ether_addr, ETHER_ADDR_LEN) != 0); | return (bcmp(mac, vf->ether_addr, ETHER_ADDR_LEN) != 0); | ||||
} | } | ||||
Show All 29 Lines | if (!(vf->flags & IXGBE_VF_CTS)) | ||||
ixgbe_send_vf_nack(adapter, vf, 0); | ixgbe_send_vf_nack(adapter, vf, 0); | ||||
} | } | ||||
static inline enum ixgbe_iov_mode | static inline enum ixgbe_iov_mode | ||||
ixgbe_get_iov_mode(struct adapter *adapter) | ixgbe_get_iov_mode(struct adapter *adapter) | ||||
{ | { | ||||
if (adapter->num_vfs == 0) | if (adapter->num_vfs == 0) | ||||
return (IXGBE_NO_VM); | return (IXGBE_NO_VM); | ||||
if (adapter->num_queues <= 2) | if (adapter->num_tx_queues <= 2) | ||||
return (IXGBE_64_VM); | return (IXGBE_64_VM); | ||||
else if (adapter->num_queues <= 4) | else if (adapter->num_tx_queues <= 4) | ||||
return (IXGBE_32_VM); | return (IXGBE_32_VM); | ||||
else | else | ||||
return (IXGBE_NO_VM); | return (IXGBE_NO_VM); | ||||
} | } | ||||
static inline u16 | static inline u16 | ||||
ixgbe_max_vfs(enum ixgbe_iov_mode mode) | ixgbe_max_vfs(enum ixgbe_iov_mode mode) | ||||
{ | { | ||||
▲ Show 20 Lines • Show All 91 Lines • Show Last 20 Lines |