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sys/dev/mlx4/mlx4_core/mlx4_profile.c
Show First 20 Lines • Show All 193 Lines • ▼ Show 20 Lines | case MLX4_RES_SRQ: | ||||
init_hca->log_num_srqs = profile[i].log_num; | init_hca->log_num_srqs = profile[i].log_num; | ||||
break; | break; | ||||
case MLX4_RES_CQ: | case MLX4_RES_CQ: | ||||
dev->caps.num_cqs = profile[i].num; | dev->caps.num_cqs = profile[i].num; | ||||
init_hca->cqc_base = profile[i].start; | init_hca->cqc_base = profile[i].start; | ||||
init_hca->log_num_cqs = profile[i].log_num; | init_hca->log_num_cqs = profile[i].log_num; | ||||
break; | break; | ||||
case MLX4_RES_EQ: | case MLX4_RES_EQ: | ||||
dev->caps.num_eqs = roundup_pow_of_two(min_t(unsigned, dev_cap->max_eqs, | if (dev_cap->flags2 & MLX4_DEV_CAP_FLAG2_SYS_EQS) { | ||||
MAX_MSIX)); | init_hca->log_num_eqs = 0x1f; | ||||
init_hca->eqc_base = profile[i].start; | init_hca->eqc_base = profile[i].start; | ||||
init_hca->num_sys_eqs = dev_cap->num_sys_eqs; | |||||
} else { | |||||
dev->caps.num_eqs = roundup_pow_of_two( | |||||
min_t(unsigned, | |||||
dev_cap->max_eqs, MAX_MSIX)); | |||||
init_hca->eqc_base = profile[i].start; | |||||
init_hca->log_num_eqs = ilog2(dev->caps.num_eqs); | init_hca->log_num_eqs = ilog2(dev->caps.num_eqs); | ||||
} | |||||
break; | break; | ||||
case MLX4_RES_DMPT: | case MLX4_RES_DMPT: | ||||
dev->caps.num_mpts = profile[i].num; | dev->caps.num_mpts = profile[i].num; | ||||
priv->mr_table.mpt_base = profile[i].start; | priv->mr_table.mpt_base = profile[i].start; | ||||
init_hca->dmpt_base = profile[i].start; | init_hca->dmpt_base = profile[i].start; | ||||
init_hca->log_mpt_sz = profile[i].log_num; | init_hca->log_mpt_sz = profile[i].log_num; | ||||
break; | break; | ||||
case MLX4_RES_CMPT: | case MLX4_RES_CMPT: | ||||
Show All 36 Lines |