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	void sheeva_l2cache_inv_range (vm_offset_t, vm_size_t);			void sheeva_l2cache_inv_range (vm_offset_t, vm_size_t);
	void sheeva_l2cache_wb_range (vm_offset_t, vm_size_t);			void sheeva_l2cache_wb_range (vm_offset_t, vm_size_t);
	void sheeva_l2cache_wbinv_all (void);			void sheeva_l2cache_wbinv_all (void);
	#endif			#endif

	#if defined(CPU_MV_PJ4B)			#if defined(CPU_MV_PJ4B)
	void armv6_idcache_wbinv_all (void);			void armv6_idcache_wbinv_all (void);
	#endif			#endif
	#if defined(CPU_MV_PJ4B) \|\| defined(CPU_CORTEXA) \|\| defined(CPU_KRAIT)			#if defined(CPU_CORTEXA8) \|\| defined(CPU_CORTEXA_MP) \|\| \
				defined(CPU_MV_PJ4B) \|\| defined(CPU_KRAIT)
	void armv7_setttb (u_int);			void armv7_setttb (u_int);
	void armv7_idcache_wbinv_all (void);			void armv7_idcache_wbinv_all (void);
	void armv7_cpu_sleep (int);			void armv7_cpu_sleep (int);
	void armv7_setup (void);			void armv7_setup (void);
	void armv7_drain_writebuf (void);			void armv7_drain_writebuf (void);
	void armv7_sev (void);			void armv7_sev (void);

	void armadaxp_idcache_wbinv_all (void);			void armadaxp_idcache_wbinv_all (void);
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