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sys/arm/arm/cpuinfo.c
Show First 20 Lines • Show All 125 Lines • ▼ Show 20 Lines | */ | ||||
cpuinfo.mem_barrier = (cpuinfo.id_mmfr2 >> 20) & 0xF; | cpuinfo.mem_barrier = (cpuinfo.id_mmfr2 >> 20) & 0xF; | ||||
/* id_mmfr3 */ | /* id_mmfr3 */ | ||||
cpuinfo.coherent_walk = (cpuinfo.id_mmfr3 >> 20) & 0xF; | cpuinfo.coherent_walk = (cpuinfo.id_mmfr3 >> 20) & 0xF; | ||||
cpuinfo.maintenance_broadcast =(cpuinfo.id_mmfr3 >> 12) & 0xF; | cpuinfo.maintenance_broadcast =(cpuinfo.id_mmfr3 >> 12) & 0xF; | ||||
/* id_pfr1 */ | /* id_pfr1 */ | ||||
cpuinfo.generic_timer_ext = (cpuinfo.id_pfr1 >> 16) & 0xF; | cpuinfo.generic_timer_ext = (cpuinfo.id_pfr1 >> 16) & 0xF; | ||||
cpuinfo.virtualization_ext = (cpuinfo.id_pfr1 >> 12) & 0xF; | cpuinfo.virtualization_ext = (cpuinfo.id_pfr1 >> 12) & 0xF; | ||||
cpuinfo.security_ext = (cpuinfo.id_pfr1 >> 4) & 0xF; | cpuinfo.security_ext = (cpuinfo.id_pfr1 >> 4) & 0xF; | ||||
/* mpidr */ | |||||
cpuinfo.mp_ext = (cpuinfo.mpidr >> 31u) & 0x1; | |||||
skra: `KASSERT(cpuinfo.mp_ext != 0, ...)` if SMP is defined but not ARM_GENERIC_KERNEL. | |||||
/* L1 Cache sizes */ | /* L1 Cache sizes */ | ||||
if (CPU_CT_FORMAT(cpuinfo.ctr) == CPU_CT_ARMV7) { | if (CPU_CT_FORMAT(cpuinfo.ctr) == CPU_CT_ARMV7) { | ||||
cpuinfo.dcache_line_size = | cpuinfo.dcache_line_size = | ||||
1 << (CPU_CT_DMINLINE(cpuinfo.ctr) + 2); | 1 << (CPU_CT_DMINLINE(cpuinfo.ctr) + 2); | ||||
cpuinfo.icache_line_size = | cpuinfo.icache_line_size = | ||||
1 << (CPU_CT_IMINLINE(cpuinfo.ctr) + 2); | 1 << (CPU_CT_IMINLINE(cpuinfo.ctr) + 2); | ||||
} else { | } else { | ||||
▲ Show 20 Lines • Show All 88 Lines • Show Last 20 Lines |
KASSERT(cpuinfo.mp_ext != 0, ...) if SMP is defined but not ARM_GENERIC_KERNEL.