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head/sys/dev/cxgbe/common/t4_hw.c
Show First 20 Lines • Show All 7,932 Lines • ▼ Show 20 Lines | int t4_port_init(struct adapter *adap, int mbox, int pf, int vf, int port_id) | ||||
memset(&c, 0, sizeof(c)); | memset(&c, 0, sizeof(c)); | ||||
for (i = 0, j = -1; i <= p->port_id; i++) { | for (i = 0, j = -1; i <= p->port_id; i++) { | ||||
do { | do { | ||||
j++; | j++; | ||||
} while ((adap->params.portvec & (1 << j)) == 0); | } while ((adap->params.portvec & (1 << j)) == 0); | ||||
} | } | ||||
if (!(adap->flags & IS_VF) || | |||||
adap->params.vfres.r_caps & FW_CMD_CAP_PORT) { | |||||
c.op_to_portid = htonl(V_FW_CMD_OP(FW_PORT_CMD) | | c.op_to_portid = htonl(V_FW_CMD_OP(FW_PORT_CMD) | | ||||
F_FW_CMD_REQUEST | F_FW_CMD_READ | | F_FW_CMD_REQUEST | F_FW_CMD_READ | | ||||
V_FW_PORT_CMD_PORTID(j)); | V_FW_PORT_CMD_PORTID(j)); | ||||
c.action_to_len16 = htonl( | c.action_to_len16 = htonl( | ||||
V_FW_PORT_CMD_ACTION(FW_PORT_ACTION_GET_PORT_INFO) | | V_FW_PORT_CMD_ACTION(FW_PORT_ACTION_GET_PORT_INFO) | | ||||
FW_LEN16(c)); | FW_LEN16(c)); | ||||
ret = t4_wr_mbox(adap, mbox, &c, sizeof(c), &c); | ret = t4_wr_mbox(adap, mbox, &c, sizeof(c), &c); | ||||
if (ret) | if (ret) | ||||
return ret; | return ret; | ||||
ret = be32_to_cpu(c.u.info.lstatus_to_modtype); | |||||
p->mdio_addr = (ret & F_FW_PORT_CMD_MDIOCAP) ? | |||||
G_FW_PORT_CMD_MDIOADDR(ret) : -1; | |||||
p->port_type = G_FW_PORT_CMD_PTYPE(ret); | |||||
p->mod_type = G_FW_PORT_CMD_MODTYPE(ret); | |||||
init_link_config(&p->link_cfg, be16_to_cpu(c.u.info.pcap)); | |||||
} | |||||
ret = t4_alloc_vi(adap, mbox, j, pf, vf, 1, addr, &rss_size); | ret = t4_alloc_vi(adap, mbox, j, pf, vf, 1, addr, &rss_size); | ||||
if (ret < 0) | if (ret < 0) | ||||
return ret; | return ret; | ||||
p->vi[0].viid = ret; | p->vi[0].viid = ret; | ||||
p->tx_chan = j; | p->tx_chan = j; | ||||
p->rx_chan_map = t4_get_mps_bg_map(adap, j); | p->rx_chan_map = t4_get_mps_bg_map(adap, j); | ||||
p->lport = j; | p->lport = j; | ||||
p->vi[0].rss_size = rss_size; | p->vi[0].rss_size = rss_size; | ||||
t4_os_set_hw_addr(adap, p->port_id, addr); | t4_os_set_hw_addr(adap, p->port_id, addr); | ||||
ret = be32_to_cpu(c.u.info.lstatus_to_modtype); | |||||
p->mdio_addr = (ret & F_FW_PORT_CMD_MDIOCAP) ? | |||||
G_FW_PORT_CMD_MDIOADDR(ret) : -1; | |||||
p->port_type = G_FW_PORT_CMD_PTYPE(ret); | |||||
p->mod_type = G_FW_PORT_CMD_MODTYPE(ret); | |||||
init_link_config(&p->link_cfg, be16_to_cpu(c.u.info.pcap)); | |||||
param = V_FW_PARAMS_MNEM(FW_PARAMS_MNEM_DEV) | | param = V_FW_PARAMS_MNEM(FW_PARAMS_MNEM_DEV) | | ||||
V_FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DEV_RSSINFO) | | V_FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DEV_RSSINFO) | | ||||
V_FW_PARAMS_PARAM_YZ(p->vi[0].viid); | V_FW_PARAMS_PARAM_YZ(p->vi[0].viid); | ||||
ret = t4_query_params(adap, mbox, pf, vf, 1, ¶m, &val); | ret = t4_query_params(adap, mbox, pf, vf, 1, ¶m, &val); | ||||
if (ret) | if (ret) | ||||
p->vi[0].rss_base = 0xffff; | p->vi[0].rss_base = 0xffff; | ||||
else { | else { | ||||
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