Differential D7498 Diff 19421 head/sys/mips/broadcom/bcm_machdep.c

Changeset View

Standalone View

head/sys/mips/broadcom/bcm_machdep.c

Show First 20 Lines • Show All 192 Lines • ▼ Show 20 Lines	platform_start(__register_t a0, __register_t a1, __register_t a2,
kernend = (vm_offset_t)&end;		kernend = (vm_offset_t)&end;
memset(&edata, 0, kernend - (vm_offset_t)(&edata));		memset(&edata, 0, kernend - (vm_offset_t)(&edata));

mips_postboot_fixup();		mips_postboot_fixup();

/* Initialize pcpu stuff */		/* Initialize pcpu stuff */
mips_pcpu0_init();		mips_pcpu0_init();

		#ifdef CFE
		/*
		* Initialize CFE firmware trampolines. This must be done
		* before any CFE APIs are called, including writing
		* to the CFE console.
		*
		* CFE passes the following values in registers:
		* a0: firmware handle
		* a2: firmware entry point
		* a3: entry point seal
		*/
		if (a3 == CFE_EPTSEAL)
		cfe_init(a0, a2);
		#endif

#if 0		#if 0
/*		/*
* Probe the Broadcom on-chip PLL clock registers		* Probe the Broadcom on-chip PLL clock registers
* and discover the CPU pipeline clock and bus clock		* and discover the CPU pipeline clock and bus clock
* multipliers from this.		* multipliers from this.
* XXX: Wrong place. You have to ask the ChipCommon		* XXX: Wrong place. You have to ask the ChipCommon
* or External Interface cores on the SiBa.		* or External Interface cores on the SiBa.
*/		*/
Show All 20 Lines	#define S5_CLKCFG1_CPUMULT_SHIFT 10
counter_freq = cpumult * refclock;		counter_freq = cpumult * refclock;
#endif		#endif

socinfo = bcm_get_socinfo();		socinfo = bcm_get_socinfo();
platform_counter_freq = socinfo->cpurate * 1000 * 1000; /* BCM4718 is 480MHz */		platform_counter_freq = socinfo->cpurate * 1000 * 1000; /* BCM4718 is 480MHz */

mips_timer_early_init(platform_counter_freq);		mips_timer_early_init(platform_counter_freq);

#ifdef CFE
/*
* Initialize CFE firmware trampolines before
* we initialize the low-level console.
*
* CFE passes the following values in registers:
* a0: firmware handle
* a2: firmware entry point
* a3: entry point seal
*/
if (a3 == CFE_EPTSEAL)
cfe_init(a0, a2);
#endif

cninit();		cninit();

mips_init();		mips_init();

mips_timer_init_params(platform_counter_freq, socinfo->double_count);		mips_timer_init_params(platform_counter_freq, socinfo->double_count);
}		}

		/*
		* CFE-based EARLY_PRINTF support. To use, add the following to the kernel
		* config:
		* option EARLY_PRINTF
		* option CFE
		* device cfe
		*/
		#if defined(EARLY_PRINTF) && defined(CFE)
		static void
		bcm_cfe_eputc(int c)
		{
		static int fd = -1;
		unsigned char ch;

		ch = (unsigned char) c;

		if (fd == -1) {
		if ((fd = cfe_getstdhandle(CFE_STDHANDLE_CONSOLE)) < 0)
		return;
		}

		if (ch == '\n')
		early_putc('\r');

		while ((cfe_write(fd, &ch, 1)) == 0)
		continue;
		}

		early_putc_t *early_putc = bcm_cfe_eputc;
		#endif /* EARLY_PRINTF */