Changeset View
Changeset View
Standalone View
Standalone View
sys/dev/bhnd/bhnd_types.h
Show First 20 Lines • Show All 79 Lines • ▼ Show 20 Lines | |||||
*/ | */ | ||||
typedef enum { | typedef enum { | ||||
BHND_ATTACH_ADAPTER = 0, /**< A bridged card, such as a PCI WiFi chipset */ | BHND_ATTACH_ADAPTER = 0, /**< A bridged card, such as a PCI WiFi chipset */ | ||||
BHND_ATTACH_NATIVE = 1 /**< A bus resident on the native host, such as | BHND_ATTACH_NATIVE = 1 /**< A bus resident on the native host, such as | ||||
* the primary or secondary bus of an embedded | * the primary or secondary bus of an embedded | ||||
* SoC */ | * SoC */ | ||||
} bhnd_attach_type; | } bhnd_attach_type; | ||||
/** | |||||
* bhnd(4) clock types. | |||||
*/ | |||||
typedef enum { | |||||
/** | |||||
* Dynamically select an appropriate clock source based on all | |||||
* outstanding clock requests. | |||||
*/ | |||||
BHND_CLOCK_DYN = (1 << 0), | |||||
/** | |||||
* Idle Low-Power (ILP). | |||||
* | |||||
* No register access is required, or long request latency is | |||||
* acceptable. | |||||
*/ | |||||
BHND_CLOCK_ILP = (1 << 1), | |||||
/** | |||||
* Active Low-Power (ALP). | |||||
* | |||||
* Low-latency register access and low-rate DMA. | |||||
*/ | |||||
BHND_CLOCK_ALP = (1 << 2), | |||||
/** | |||||
* High Throughput (HT). | |||||
* | |||||
* High bus throughput and lowest-latency register access. | |||||
*/ | |||||
BHND_CLOCK_HT = (1 << 3) | |||||
} bhnd_clock; | |||||
/** | |||||
* Given two clock types, return the type with the highest precedence. | |||||
*/ | |||||
static inline bhnd_clock | |||||
bhnd_clock_max(bhnd_clock a, bhnd_clock b) { | |||||
return (a > b ? a : b); | |||||
} | |||||
/** | |||||
* bhnd(4) clock sources. | |||||
*/ | |||||
typedef enum { | |||||
/** | |||||
* Clock is provided by the PCI bus clock | |||||
*/ | |||||
BHND_CLKSRC_PCI = 0, | |||||
/** Clock is provided by a crystal. */ | |||||
BHND_CLKSRC_XTAL = 1, | |||||
/** Clock is provided by a low power oscillator. */ | |||||
BHND_CLKSRC_LPO = 2, | |||||
/** Clock source is unknown */ | |||||
BHND_CLKSRC_UNKNOWN = 3 | |||||
} bhnd_clksrc; | |||||
/** Evaluates to true if @p cls is a device class that can be configured | /** Evaluates to true if @p cls is a device class that can be configured | ||||
* as a host bridge device. */ | * as a host bridge device. */ | ||||
#define BHND_DEVCLASS_SUPPORTS_HOSTB(cls) \ | #define BHND_DEVCLASS_SUPPORTS_HOSTB(cls) \ | ||||
((cls) == BHND_DEVCLASS_PCI || (cls) == BHND_DEVCLASS_PCIE || \ | ((cls) == BHND_DEVCLASS_PCI || (cls) == BHND_DEVCLASS_PCIE || \ | ||||
(cls) == BHND_DEVCLASS_PCCARD) | (cls) == BHND_DEVCLASS_PCCARD) | ||||
/** | /** | ||||
* BHND bus address. | * BHND bus address. | ||||
Show All 13 Lines |