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sys/dev/bhnd/bhnd_bus_if.m
Show First 20 Lines • Show All 55 Lines • ▼ Show 20 Lines | bhnd_bus_null_get_chipid(device_t dev, device_t child) | ||||
panic("bhnd_bus_get_chipid unimplemented"); | panic("bhnd_bus_get_chipid unimplemented"); | ||||
} | } | ||||
static bhnd_attach_type | static bhnd_attach_type | ||||
bhnd_bus_null_get_attach_type(device_t dev, device_t child) | bhnd_bus_null_get_attach_type(device_t dev, device_t child) | ||||
{ | { | ||||
panic("bhnd_bus_get_attach_type unimplemented"); | panic("bhnd_bus_get_attach_type unimplemented"); | ||||
} | } | ||||
static bhnd_clksrc | |||||
bhnd_bus_null_pwrctl_get_clksrc(device_t dev, device_t child, | |||||
bhnd_clock clock) | |||||
{ | |||||
return (BHND_CLKSRC_UNKNOWN); | |||||
} | |||||
static int | static int | ||||
bhnd_bus_null_pwrctl_gate_clock(device_t dev, device_t child, | |||||
bhnd_clock clock) | |||||
{ | |||||
return (ENODEV); | |||||
} | |||||
static int | |||||
bhnd_bus_null_pwrctl_ungate_clock(device_t dev, device_t child, | |||||
bhnd_clock clock) | |||||
{ | |||||
return (ENODEV); | |||||
} | |||||
static int | |||||
bhnd_bus_null_read_board_info(device_t dev, device_t child, | bhnd_bus_null_read_board_info(device_t dev, device_t child, | ||||
struct bhnd_board_info *info) | struct bhnd_board_info *info) | ||||
{ | { | ||||
panic("bhnd_bus_read_boardinfo unimplemented"); | panic("bhnd_bus_read_boardinfo unimplemented"); | ||||
} | } | ||||
static void | static void | ||||
bhnd_bus_null_child_added(device_t dev, device_t child) | bhnd_bus_null_child_added(device_t dev, device_t child) | ||||
{ | { | ||||
} | } | ||||
static int | |||||
bhnd_bus_null_alloc_pmu(device_t dev, device_t child) | |||||
{ | |||||
panic("bhnd_bus_alloc_pmu unimplemented"); | |||||
} | |||||
static int | |||||
bhnd_bus_null_release_pmu(device_t dev, device_t child) | |||||
{ | |||||
panic("bhnd_bus_release_pmu unimplemented"); | |||||
} | |||||
static int | |||||
bhnd_bus_null_request_clock(device_t dev, device_t child, | |||||
bhnd_clock clock) | |||||
{ | |||||
panic("bhnd_bus_request_clock unimplemented"); | |||||
} | |||||
static int | |||||
bhnd_bus_null_enable_clocks(device_t dev, device_t child, | |||||
uint32_t clocks) | |||||
{ | |||||
panic("bhnd_bus_enable_clocks unimplemented"); | |||||
} | |||||
static int | |||||
bhnd_bus_null_request_ext_rsrc(device_t dev, device_t child, | |||||
u_int rsrc) | |||||
{ | |||||
panic("bhnd_bus_request_ext_rsrc unimplemented"); | |||||
} | |||||
static int | |||||
bhnd_bus_null_release_ext_rsrc(device_t dev, device_t child, | |||||
u_int rsrc) | |||||
{ | |||||
panic("bhnd_bus_release_ext_rsrc unimplemented"); | |||||
} | |||||
static uint32_t | |||||
bhnd_bus_null_read_config(device_t dev, device_t child, | |||||
bus_size_t offset, u_int width) | |||||
{ | |||||
panic("bhnd_bus_null_read_config unimplemented"); | |||||
} | |||||
static void | |||||
bhnd_bus_null_write_config(device_t dev, device_t child, | |||||
bus_size_t offset, uint32_t val, u_int width) | |||||
{ | |||||
panic("bhnd_bus_null_write_config unimplemented"); | |||||
} | |||||
static device_t | static device_t | ||||
bhnd_bus_null_find_hostb_device(device_t dev) | bhnd_bus_null_find_hostb_device(device_t dev) | ||||
{ | { | ||||
panic("bhnd_bus_find_hostb_device unimplemented"); | panic("bhnd_bus_find_hostb_device unimplemented"); | ||||
} | } | ||||
static bool | static bool | ||||
bhnd_bus_null_is_hw_disabled(device_t dev, device_t child) | bhnd_bus_null_is_hw_disabled(device_t dev, device_t child) | ||||
▲ Show 20 Lines • Show All 171 Lines • ▼ Show 20 Lines | |||||
METHOD void free_devinfo { | METHOD void free_devinfo { | ||||
device_t dev; | device_t dev; | ||||
struct bhnd_devinfo *dinfo; | struct bhnd_devinfo *dinfo; | ||||
}; | }; | ||||
/** | /** | ||||
* Notify a bhnd bus that a child was added. | * Notify a bhnd bus that a child was added. | ||||
* | * | ||||
* Called at the end of BUS_ADD_CHILD() to allow the concrete bhnd(4) | * This method must be called by concrete bhnd(4) driver impementations | ||||
* driver instance to initialize any additional driver-specific state for the | * after @p child's bus state is fully initialized. | ||||
* child. | |||||
* | * | ||||
* @param dev The bhnd bus whose child is being added. | * @param dev The bhnd bus whose child is being added. | ||||
* @param child The child added to @p dev. | * @param child The child added to @p dev. | ||||
*/ | */ | ||||
METHOD void child_added { | METHOD void child_added { | ||||
device_t dev; | device_t dev; | ||||
device_t child; | device_t child; | ||||
} DEFAULT bhnd_bus_null_child_added; | } DEFAULT bhnd_bus_null_child_added; | ||||
Show All 22 Lines | |||||
* | * | ||||
* @retval 0 success | * @retval 0 success | ||||
* @retval non-zero error | * @retval non-zero error | ||||
*/ | */ | ||||
METHOD int suspend_core { | METHOD int suspend_core { | ||||
device_t dev; | device_t dev; | ||||
device_t child; | device_t child; | ||||
} | } | ||||
/** | |||||
* If supported by the chipset, return the clock source for the given clock. | |||||
* | |||||
* This function is only supported on early PWRCTL-equipped chipsets | |||||
* that expose clock management via their host bridge interface. Currently, | |||||
* this includes PCI (not PCIe) devices, with ChipCommon core revisions 0-9. | |||||
* | |||||
* @param dev The parent of @p child. | |||||
* @param child The bhnd device requesting a clock source. | |||||
* @param clock The clock for which a clock source will be returned. | |||||
* | |||||
* @retval bhnd_clksrc The clock source for @p clock. | |||||
* @retval BHND_CLKSRC_UNKNOWN If @p clock is unsupported, or its | |||||
* clock source is not known to the bus. | |||||
*/ | |||||
METHOD bhnd_clksrc pwrctl_get_clksrc { | |||||
device_t dev; | |||||
device_t child; | |||||
bhnd_clock clock; | |||||
} DEFAULT bhnd_bus_null_pwrctl_get_clksrc; | |||||
/** | |||||
* If supported by the chipset, gate the clock source for @p clock | |||||
* | |||||
* This function is only supported on early PWRCTL-equipped chipsets | |||||
* that expose clock management via their host bridge interface. Currently, | |||||
* this includes PCI (not PCIe) devices, with ChipCommon core revisions 0-9. | |||||
* | |||||
* @param dev The parent of @p child. | |||||
* @param child The bhnd device requesting clock gating. | |||||
* @param clock The clock to be disabled. | |||||
* | |||||
* @retval 0 success | |||||
* @retval ENODEV If bus-level clock source management is not supported. | |||||
* @retval ENXIO If bus-level management of @p clock is not supported. | |||||
*/ | |||||
METHOD int pwrctl_gate_clock { | |||||
device_t dev; | |||||
device_t child; | |||||
bhnd_clock clock; | |||||
} DEFAULT bhnd_bus_null_pwrctl_gate_clock; | |||||
/** | |||||
* If supported by the chipset, ungate the clock source for @p clock | |||||
* | |||||
* This function is only supported on early PWRCTL-equipped chipsets | |||||
* that expose clock management via their host bridge interface. Currently, | |||||
* this includes PCI (not PCIe) devices, with ChipCommon core revisions 0-9. | |||||
* | |||||
* @param dev The parent of @p child. | |||||
* @param child The bhnd device requesting clock gating. | |||||
* @param clock The clock to be enabled. | |||||
* | |||||
* @retval 0 success | |||||
* @retval ENODEV If bus-level clock source management is not supported. | |||||
* @retval ENXIO If bus-level management of @p clock is not supported. | |||||
*/ | |||||
METHOD int pwrctl_ungate_clock { | |||||
device_t dev; | |||||
device_t child; | |||||
bhnd_clock clock; | |||||
} DEFAULT bhnd_bus_null_pwrctl_ungate_clock; | |||||
/** | |||||
* Allocate and enable per-core PMU request handling for @p child. | |||||
* | |||||
* The region containing the core's PMU register block (if any) must be | |||||
* allocated via bus_alloc_resource(9) (or bhnd_alloc_resource) before | |||||
* calling BHND_BUS_ALLOC_PMU(), and must not be released until after | |||||
* calling BHND_BUS_RELEASE_PMU(). | |||||
* | |||||
* @param dev The parent of @p child. | |||||
* @param child The requesting bhnd device. | |||||
*/ | |||||
METHOD int alloc_pmu { | |||||
device_t dev; | |||||
device_t child; | |||||
} DEFAULT bhnd_bus_null_alloc_pmu; | |||||
/** | |||||
* Release per-core PMU resources allocated for @p child. Any | |||||
* outstanding PMU requests are discarded. | |||||
* | |||||
* @param dev The parent of @p child. | |||||
* @param child The requesting bhnd device. | |||||
*/ | |||||
METHOD int release_pmu { | |||||
device_t dev; | |||||
device_t child; | |||||
} DEFAULT bhnd_bus_null_release_pmu; | |||||
/** | |||||
* Request that @p clock (or faster) be routed to @p child. | |||||
* | |||||
* A driver must ask the bhnd bus to allocate PMU request state | |||||
* via BHND_BUS_ALLOC_PMU() before it can request clock resources. | |||||
* | |||||
* Request multiplexing is managed by the bus. | |||||
* | |||||
* @param dev The parent of @p child. | |||||
* @param child The bhnd device requesting @p clock. | |||||
* @param clock The requested clock source. | |||||
* | |||||
* @retval 0 success | |||||
* @retval ENODEV If an unsupported clock was requested. | |||||
* @retval ENXIO If the PMU has not been initialized or is otherwise unvailable. | |||||
*/ | |||||
METHOD int request_clock { | |||||
device_t dev; | |||||
device_t child; | |||||
bhnd_clock clock; | |||||
} DEFAULT bhnd_bus_null_request_clock; | |||||
/** | |||||
* Request that @p clocks be powered on behalf of @p child. | |||||
* | |||||
* This will power on clock sources (e.g. XTAL, PLL, etc) required for | |||||
* @p clocks and wait until they are ready, discarding any previous | |||||
* requests by @p child. | |||||
* | |||||
* Request multiplexing is managed by the bus. | |||||
* | |||||
* A driver must ask the bhnd bus to allocate PMU request state | |||||
* via BHND_BUS_ALLOC_PMU() before it can request clock resources. | |||||
* | |||||
* @param dev The parent of @p child. | |||||
* @param child The bhnd device requesting @p clock. | |||||
* @param clock The requested clock source. | |||||
* | |||||
* @retval 0 success | |||||
* @retval ENODEV If an unsupported clock was requested. | |||||
* @retval ENXIO If the PMU has not been initialized or is otherwise unvailable. | |||||
*/ | |||||
METHOD int enable_clocks { | |||||
device_t dev; | |||||
device_t child; | |||||
uint32_t clocks; | |||||
} DEFAULT bhnd_bus_null_enable_clocks; | |||||
/** | |||||
* Power up an external PMU-managed resource assigned to @p child. | |||||
* | |||||
* A driver must ask the bhnd bus to allocate PMU request state | |||||
* via BHND_BUS_ALLOC_PMU() before it can request PMU resources. | |||||
* | |||||
* @param dev The parent of @p child. | |||||
* @param child The bhnd device requesting @p rsrc. | |||||
* @param rsrc The core-specific external resource identifier. | |||||
* | |||||
* @retval 0 success | |||||
* @retval ENODEV If the PMU does not support @p rsrc. | |||||
* @retval ENXIO If the PMU has not been initialized or is otherwise unvailable. | |||||
*/ | |||||
METHOD int request_ext_rsrc { | |||||
device_t dev; | |||||
device_t child; | |||||
u_int rsrc; | |||||
} DEFAULT bhnd_bus_null_request_ext_rsrc; | |||||
/** | |||||
* Power down an external PMU-managed resource assigned to @p child. | |||||
* | |||||
* A driver must ask the bhnd bus to allocate PMU request state | |||||
* via BHND_BUS_ALLOC_PMU() before it can request PMU resources. | |||||
* | |||||
* @param dev The parent of @p child. | |||||
* @param child The bhnd device requesting @p rsrc. | |||||
* @param rsrc The core-specific external resource number. | |||||
* | |||||
* @retval 0 success | |||||
* @retval ENODEV If the PMU does not support @p rsrc. | |||||
* @retval ENXIO If the PMU has not been initialized or is otherwise unvailable. | |||||
*/ | |||||
METHOD int release_ext_rsrc { | |||||
device_t dev; | |||||
device_t child; | |||||
u_int rsrc; | |||||
} DEFAULT bhnd_bus_null_release_ext_rsrc; | |||||
/** | |||||
* Read @p width bytes at @p offset from the bus-specific agent/config | |||||
* space of @p child. | |||||
* | |||||
* @param dev The parent of @p child. | |||||
* @param child The bhnd device for which @p offset should be read. | |||||
* @param offset The offset to be read. | |||||
* @param width The size of the access. Must be 1, 2 or 4 bytes. | |||||
* | |||||
* The exact behavior of this method is bus-specific. In the case of | |||||
* bcma(4), this method provides access to the first agent port of @p child. | |||||
* | |||||
* @note Device drivers should only use this API for functionality | |||||
* that is not available via another bhnd(4) function. | |||||
*/ | |||||
METHOD uint32_t read_config { | |||||
device_t dev; | |||||
device_t child; | |||||
bus_size_t offset; | |||||
u_int width; | |||||
} DEFAULT bhnd_bus_null_read_config; | |||||
/** | |||||
* Read @p width bytes at @p offset from the bus-specific agent/config | |||||
* space of @p child. | |||||
* | |||||
* @param dev The parent of @p child. | |||||
* @param child The bhnd device for which @p offset should be read. | |||||
* @param offset The offset to be written. | |||||
* @param width The size of the access. Must be 1, 2 or 4 bytes. | |||||
* | |||||
* The exact behavior of this method is bus-specific. In the case of | |||||
* bcma(4), this method provides access to the first agent port of @p child. | |||||
* | |||||
* @note Device drivers should only use this API for functionality | |||||
* that is not available via another bhnd(4) function. | |||||
*/ | |||||
METHOD void write_config { | |||||
device_t dev; | |||||
device_t child; | |||||
bus_size_t offset; | |||||
uint32_t val; | |||||
u_int width; | |||||
} DEFAULT bhnd_bus_null_write_config; | |||||
/** | /** | ||||
* Allocate a bhnd resource. | * Allocate a bhnd resource. | ||||
* | * | ||||
* This method's semantics are functionally identical to the bus API of the same | * This method's semantics are functionally identical to the bus API of the same | ||||
* name; refer to BUS_ALLOC_RESOURCE for complete documentation. | * name; refer to BUS_ALLOC_RESOURCE for complete documentation. | ||||
*/ | */ | ||||
METHOD struct bhnd_resource * alloc_resource { | METHOD struct bhnd_resource * alloc_resource { | ||||
▲ Show 20 Lines • Show All 627 Lines • Show Last 20 Lines |