Differential D7391 Diff 18946 sys/dev/ixl/i40e_common.c

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sys/dev/ixl/i40e_common.c

Show First 20 Lines • Show All 58 Lines • ▼ Show 20 Lines	if (hw->vendor_id == I40E_INTEL_VENDOR_ID) {
case I40E_DEV_ID_KX_C:		case I40E_DEV_ID_KX_C:
case I40E_DEV_ID_QSFP_A:		case I40E_DEV_ID_QSFP_A:
case I40E_DEV_ID_QSFP_B:		case I40E_DEV_ID_QSFP_B:
case I40E_DEV_ID_QSFP_C:		case I40E_DEV_ID_QSFP_C:
case I40E_DEV_ID_10G_BASE_T:		case I40E_DEV_ID_10G_BASE_T:
case I40E_DEV_ID_10G_BASE_T4:		case I40E_DEV_ID_10G_BASE_T4:
case I40E_DEV_ID_20G_KR2:		case I40E_DEV_ID_20G_KR2:
case I40E_DEV_ID_20G_KR2_A:		case I40E_DEV_ID_20G_KR2_A:
		case I40E_DEV_ID_25G_B:
		case I40E_DEV_ID_25G_SFP28:
hw->mac.type = I40E_MAC_XL710;		hw->mac.type = I40E_MAC_XL710;
break;		break;
		case I40E_DEV_ID_X722_A0:
		case I40E_DEV_ID_KX_X722:
		case I40E_DEV_ID_QSFP_X722:
		case I40E_DEV_ID_SFP_X722:
		case I40E_DEV_ID_1G_BASE_T_X722:
		case I40E_DEV_ID_10G_BASE_T_X722:
		case I40E_DEV_ID_SFP_I_X722:
		hw->mac.type = I40E_MAC_X722;
		break;
		case I40E_DEV_ID_X722_VF:
		case I40E_DEV_ID_X722_VF_HV:
		case I40E_DEV_ID_X722_A0_VF:
		hw->mac.type = I40E_MAC_X722_VF;
		break;
case I40E_DEV_ID_VF:		case I40E_DEV_ID_VF:
case I40E_DEV_ID_VF_HV:		case I40E_DEV_ID_VF_HV:
hw->mac.type = I40E_MAC_VF;		hw->mac.type = I40E_MAC_VF;
break;		break;
default:		default:
hw->mac.type = I40E_MAC_GENERIC;		hw->mac.type = I40E_MAC_GENERIC;
break;		break;
}		}
▲ Show 20 Lines • Show All 259 Lines • ▼ Show 20 Lines	for (i = 0; i < (len - 16); i += 16)
"\t0x%04X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n",		"\t0x%04X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n",
i, buf[i], buf[i+1], buf[i+2], buf[i+3],		i, buf[i], buf[i+1], buf[i+2], buf[i+3],
buf[i+4], buf[i+5], buf[i+6], buf[i+7],		buf[i+4], buf[i+5], buf[i+6], buf[i+7],
buf[i+8], buf[i+9], buf[i+10], buf[i+11],		buf[i+8], buf[i+9], buf[i+10], buf[i+11],
buf[i+12], buf[i+13], buf[i+14], buf[i+15]);		buf[i+12], buf[i+13], buf[i+14], buf[i+15]);
/* the most we could have left is 16 bytes, pad with zeros */		/* the most we could have left is 16 bytes, pad with zeros */
if (i < len) {		if (i < len) {
char d_buf[16];		char d_buf[16];
int j;		int j, i_sav;

		i_sav = i;
memset(d_buf, 0, sizeof(d_buf));		memset(d_buf, 0, sizeof(d_buf));
for (j = 0; i < len; j++, i++)		for (j = 0; i < len; j++, i++)
d_buf[j] = buf[i];		d_buf[j] = buf[i];
i40e_debug(hw, mask,		i40e_debug(hw, mask,
"\t0x%04X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n",		"\t0x%04X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n",
i, d_buf[0], d_buf[1], d_buf[2], d_buf[3],		i_sav, d_buf[0], d_buf[1], d_buf[2], d_buf[3],
d_buf[4], d_buf[5], d_buf[6], d_buf[7],		d_buf[4], d_buf[5], d_buf[6], d_buf[7],
d_buf[8], d_buf[9], d_buf[10], d_buf[11],		d_buf[8], d_buf[9], d_buf[10], d_buf[11],
d_buf[12], d_buf[13], d_buf[14], d_buf[15]);		d_buf[12], d_buf[13], d_buf[14], d_buf[15]);
}		}
}		}
}		}

/**		/**
Show All 35 Lines	enum i40e_status_code i40e_aq_queue_shutdown(struct i40e_hw *hw,

if (unloading)		if (unloading)
cmd->driver_unloading = CPU_TO_LE32(I40E_AQ_DRIVER_UNLOADING);		cmd->driver_unloading = CPU_TO_LE32(I40E_AQ_DRIVER_UNLOADING);
status = i40e_asq_send_command(hw, &desc, NULL, 0, NULL);		status = i40e_asq_send_command(hw, &desc, NULL, 0, NULL);

return status;		return status;
}		}

		/**
		* i40e_aq_get_set_rss_lut
		* @hw: pointer to the hardware structure
		* @vsi_id: vsi fw index
		* @pf_lut: for PF table set TRUE, for VSI table set FALSE
		* @lut: pointer to the lut buffer provided by the caller
		* @lut_size: size of the lut buffer
		* @set: set TRUE to set the table, FALSE to get the table
		*
		* Internal function to get or set RSS look up table
		**/
		static enum i40e_status_code i40e_aq_get_set_rss_lut(struct i40e_hw *hw,
		u16 vsi_id, bool pf_lut,
		u8 *lut, u16 lut_size,
		bool set)
		{
		enum i40e_status_code status;
		struct i40e_aq_desc desc;
		struct i40e_aqc_get_set_rss_lut *cmd_resp =
		(struct i40e_aqc_get_set_rss_lut *)&desc.params.raw;

		if (set)
		i40e_fill_default_direct_cmd_desc(&desc,
		i40e_aqc_opc_set_rss_lut);
		else
		i40e_fill_default_direct_cmd_desc(&desc,
		i40e_aqc_opc_get_rss_lut);

		/* Indirect command */
		desc.flags \|= CPU_TO_LE16((u16)I40E_AQ_FLAG_BUF);
		desc.flags \|= CPU_TO_LE16((u16)I40E_AQ_FLAG_RD);

		cmd_resp->vsi_id =
		CPU_TO_LE16((u16)((vsi_id <<
		I40E_AQC_SET_RSS_LUT_VSI_ID_SHIFT) &
		I40E_AQC_SET_RSS_LUT_VSI_ID_MASK));
		cmd_resp->vsi_id \|= CPU_TO_LE16((u16)I40E_AQC_SET_RSS_LUT_VSI_VALID);

		if (pf_lut)
		cmd_resp->flags \|= CPU_TO_LE16((u16)
		((I40E_AQC_SET_RSS_LUT_TABLE_TYPE_PF <<
		I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT) &
		I40E_AQC_SET_RSS_LUT_TABLE_TYPE_MASK));
		else
		cmd_resp->flags \|= CPU_TO_LE16((u16)
		((I40E_AQC_SET_RSS_LUT_TABLE_TYPE_VSI <<
		I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT) &
		I40E_AQC_SET_RSS_LUT_TABLE_TYPE_MASK));

		status = i40e_asq_send_command(hw, &desc, lut, lut_size, NULL);

		return status;
		}

		/**
		* i40e_aq_get_rss_lut
		* @hw: pointer to the hardware structure
		* @vsi_id: vsi fw index
		* @pf_lut: for PF table set TRUE, for VSI table set FALSE
		* @lut: pointer to the lut buffer provided by the caller
		* @lut_size: size of the lut buffer
		*
		* get the RSS lookup table, PF or VSI type
		**/
		enum i40e_status_code i40e_aq_get_rss_lut(struct i40e_hw *hw, u16 vsi_id,
		bool pf_lut, u8 *lut, u16 lut_size)
		{
		return i40e_aq_get_set_rss_lut(hw, vsi_id, pf_lut, lut, lut_size,
		FALSE);
		}

		/**
		* i40e_aq_set_rss_lut
		* @hw: pointer to the hardware structure
		* @vsi_id: vsi fw index
		* @pf_lut: for PF table set TRUE, for VSI table set FALSE
		* @lut: pointer to the lut buffer provided by the caller
		* @lut_size: size of the lut buffer
		*
		* set the RSS lookup table, PF or VSI type
		**/
		enum i40e_status_code i40e_aq_set_rss_lut(struct i40e_hw *hw, u16 vsi_id,
		bool pf_lut, u8 *lut, u16 lut_size)
		{
		return i40e_aq_get_set_rss_lut(hw, vsi_id, pf_lut, lut, lut_size, TRUE);
		}

		/**
		* i40e_aq_get_set_rss_key
		* @hw: pointer to the hw struct
		* @vsi_id: vsi fw index
		* @key: pointer to key info struct
		* @set: set TRUE to set the key, FALSE to get the key
		*
		* get the RSS key per VSI
		**/
		static enum i40e_status_code i40e_aq_get_set_rss_key(struct i40e_hw *hw,
		u16 vsi_id,
		struct i40e_aqc_get_set_rss_key_data *key,
		bool set)
		{
		enum i40e_status_code status;
		struct i40e_aq_desc desc;
		struct i40e_aqc_get_set_rss_key *cmd_resp =
		(struct i40e_aqc_get_set_rss_key *)&desc.params.raw;
		u16 key_size = sizeof(struct i40e_aqc_get_set_rss_key_data);

		if (set)
		i40e_fill_default_direct_cmd_desc(&desc,
		i40e_aqc_opc_set_rss_key);
		else
		i40e_fill_default_direct_cmd_desc(&desc,
		i40e_aqc_opc_get_rss_key);

		/* Indirect command */
		desc.flags \|= CPU_TO_LE16((u16)I40E_AQ_FLAG_BUF);
		desc.flags \|= CPU_TO_LE16((u16)I40E_AQ_FLAG_RD);

		cmd_resp->vsi_id =
		CPU_TO_LE16((u16)((vsi_id <<
		I40E_AQC_SET_RSS_KEY_VSI_ID_SHIFT) &
		I40E_AQC_SET_RSS_KEY_VSI_ID_MASK));
		cmd_resp->vsi_id \|= CPU_TO_LE16((u16)I40E_AQC_SET_RSS_KEY_VSI_VALID);

		status = i40e_asq_send_command(hw, &desc, key, key_size, NULL);

		return status;
		}

		/**
		* i40e_aq_get_rss_key
		* @hw: pointer to the hw struct
		* @vsi_id: vsi fw index
		* @key: pointer to key info struct
		*
		**/
		enum i40e_status_code i40e_aq_get_rss_key(struct i40e_hw *hw,
		u16 vsi_id,
		struct i40e_aqc_get_set_rss_key_data *key)
		{
		return i40e_aq_get_set_rss_key(hw, vsi_id, key, FALSE);
		}

		/**
		* i40e_aq_set_rss_key
		* @hw: pointer to the hw struct
		* @vsi_id: vsi fw index
		* @key: pointer to key info struct
		*
		* set the RSS key per VSI
		**/
		enum i40e_status_code i40e_aq_set_rss_key(struct i40e_hw *hw,
		u16 vsi_id,
		struct i40e_aqc_get_set_rss_key_data *key)
		{
		return i40e_aq_get_set_rss_key(hw, vsi_id, key, TRUE);
		}

/* The i40e_ptype_lookup table is used to convert from the 8-bit ptype in the		/* The i40e_ptype_lookup table is used to convert from the 8-bit ptype in the
* hardware to a bit-field that can be used by SW to more easily determine the		* hardware to a bit-field that can be used by SW to more easily determine the
* packet type.		* packet type.
*		*
* Macros are used to shorten the table lines and make this table human		* Macros are used to shorten the table lines and make this table human
* readable.		* readable.
*		*
* We store the PTYPE in the top byte of the bit field - this is just so that		* We store the PTYPE in the top byte of the bit field - this is just so that
▲ Show 20 Lines • Show All 147 Lines • ▼ Show 20 Lines	struct i40e_rx_ptype_decoded i40e_ptype_lookup[] = {
I40E_PTT_UNUSED_ENTRY(84),		I40E_PTT_UNUSED_ENTRY(84),
I40E_PTT(85, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, TCP, PAY4),		I40E_PTT(85, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, TCP, PAY4),
I40E_PTT(86, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, SCTP, PAY4),		I40E_PTT(86, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, SCTP, PAY4),
I40E_PTT(87, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, ICMP, PAY4),		I40E_PTT(87, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, ICMP, PAY4),

/* Non Tunneled IPv6 */		/* Non Tunneled IPv6 */
I40E_PTT(88, IP, IPV6, FRG, NONE, NONE, NOF, NONE, PAY3),		I40E_PTT(88, IP, IPV6, FRG, NONE, NONE, NOF, NONE, PAY3),
I40E_PTT(89, IP, IPV6, NOF, NONE, NONE, NOF, NONE, PAY3),		I40E_PTT(89, IP, IPV6, NOF, NONE, NONE, NOF, NONE, PAY3),
I40E_PTT(90, IP, IPV6, NOF, NONE, NONE, NOF, UDP, PAY3),		I40E_PTT(90, IP, IPV6, NOF, NONE, NONE, NOF, UDP, PAY4),
I40E_PTT_UNUSED_ENTRY(91),		I40E_PTT_UNUSED_ENTRY(91),
I40E_PTT(92, IP, IPV6, NOF, NONE, NONE, NOF, TCP, PAY4),		I40E_PTT(92, IP, IPV6, NOF, NONE, NONE, NOF, TCP, PAY4),
I40E_PTT(93, IP, IPV6, NOF, NONE, NONE, NOF, SCTP, PAY4),		I40E_PTT(93, IP, IPV6, NOF, NONE, NONE, NOF, SCTP, PAY4),
I40E_PTT(94, IP, IPV6, NOF, NONE, NONE, NOF, ICMP, PAY4),		I40E_PTT(94, IP, IPV6, NOF, NONE, NONE, NOF, ICMP, PAY4),

/* IPv6 --> IPv4 */		/* IPv6 --> IPv4 */
I40E_PTT(95, IP, IPV6, NOF, IP_IP, IPV4, FRG, NONE, PAY3),		I40E_PTT(95, IP, IPV6, NOF, IP_IP, IPV4, FRG, NONE, PAY3),
I40E_PTT(96, IP, IPV6, NOF, IP_IP, IPV4, NOF, NONE, PAY3),		I40E_PTT(96, IP, IPV6, NOF, IP_IP, IPV4, NOF, NONE, PAY3),
▲ Show 20 Lines • Show All 233 Lines • ▼ Show 20 Lines	enum i40e_status_code i40e_init_shared_code(struct i40e_hw *hw)
u32 port, ari, func_rid;		u32 port, ari, func_rid;

DEBUGFUNC("i40e_init_shared_code");		DEBUGFUNC("i40e_init_shared_code");

i40e_set_mac_type(hw);		i40e_set_mac_type(hw);

switch (hw->mac.type) {		switch (hw->mac.type) {
case I40E_MAC_XL710:		case I40E_MAC_XL710:
		case I40E_MAC_X722:
break;		break;
default:		default:
return I40E_ERR_DEVICE_NOT_SUPPORTED;		return I40E_ERR_DEVICE_NOT_SUPPORTED;
}		}

hw->phy.get_link_info = TRUE;		hw->phy.get_link_info = TRUE;

/* Determine port number and PF number*/		/* Determine port number and PF number*/
port = (rd32(hw, I40E_PFGEN_PORTNUM) & I40E_PFGEN_PORTNUM_PORT_NUM_MASK)		port = (rd32(hw, I40E_PFGEN_PORTNUM) & I40E_PFGEN_PORTNUM_PORT_NUM_MASK)
>> I40E_PFGEN_PORTNUM_PORT_NUM_SHIFT;		>> I40E_PFGEN_PORTNUM_PORT_NUM_SHIFT;
hw->port = (u8)port;		hw->port = (u8)port;
ari = (rd32(hw, I40E_GLPCI_CAPSUP) & I40E_GLPCI_CAPSUP_ARI_EN_MASK) >>		ari = (rd32(hw, I40E_GLPCI_CAPSUP) & I40E_GLPCI_CAPSUP_ARI_EN_MASK) >>
I40E_GLPCI_CAPSUP_ARI_EN_SHIFT;		I40E_GLPCI_CAPSUP_ARI_EN_SHIFT;
func_rid = rd32(hw, I40E_PF_FUNC_RID);		func_rid = rd32(hw, I40E_PF_FUNC_RID);
if (ari)		if (ari)
hw->pf_id = (u8)(func_rid & 0xff);		hw->pf_id = (u8)(func_rid & 0xff);
else		else
hw->pf_id = (u8)(func_rid & 0x7);		hw->pf_id = (u8)(func_rid & 0x7);

		if (hw->mac.type == I40E_MAC_X722)
		hw->flags \|= I40E_HW_FLAG_AQ_SRCTL_ACCESS_ENABLE;

status = i40e_init_nvm(hw);		status = i40e_init_nvm(hw);
return status;		return status;
}		}

/**		/**
* i40e_aq_mac_address_read - Retrieve the MAC addresses		* i40e_aq_mac_address_read - Retrieve the MAC addresses
* @hw: pointer to the hw struct		* @hw: pointer to the hw struct
* @flags: a return indicator of what addresses were added to the addr store		* @flags: a return indicator of what addresses were added to the addr store
▲ Show 20 Lines • Show All 256 Lines • ▼ Show 20 Lines	enum i40e_status_code i40e_pf_reset(struct i40e_hw *hw)
/* Poll for Global Reset steady state in case of recent GRST.		/* Poll for Global Reset steady state in case of recent GRST.
* The grst delay value is in 100ms units, and we'll wait a		* The grst delay value is in 100ms units, and we'll wait a
* couple counts longer to be sure we don't just miss the end.		* couple counts longer to be sure we don't just miss the end.
*/		*/
grst_del = (rd32(hw, I40E_GLGEN_RSTCTL) &		grst_del = (rd32(hw, I40E_GLGEN_RSTCTL) &
I40E_GLGEN_RSTCTL_GRSTDEL_MASK) >>		I40E_GLGEN_RSTCTL_GRSTDEL_MASK) >>
I40E_GLGEN_RSTCTL_GRSTDEL_SHIFT;		I40E_GLGEN_RSTCTL_GRSTDEL_SHIFT;

/* It can take upto 15 secs for GRST steady state */		grst_del = grst_del * 20;
grst_del = grst_del * 20; /* bump it to 16 secs max to be safe */

for (cnt = 0; cnt < grst_del; cnt++) {		for (cnt = 0; cnt < grst_del; cnt++) {
reg = rd32(hw, I40E_GLGEN_RSTAT);		reg = rd32(hw, I40E_GLGEN_RSTAT);
if (!(reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK))		if (!(reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK))
break;		break;
i40e_msec_delay(100);		i40e_msec_delay(100);
}		}
if (reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK) {		if (reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK) {
▲ Show 20 Lines • Show All 330 Lines • ▼ Show 20 Lines	desc.params.external.param0 \|=
CPU_TO_LE32(I40E_AQ_PHY_REPORT_INITIAL_VALUES);		CPU_TO_LE32(I40E_AQ_PHY_REPORT_INITIAL_VALUES);

status = i40e_asq_send_command(hw, &desc, abilities, abilities_size,		status = i40e_asq_send_command(hw, &desc, abilities, abilities_size,
cmd_details);		cmd_details);

if (hw->aq.asq_last_status == I40E_AQ_RC_EIO)		if (hw->aq.asq_last_status == I40E_AQ_RC_EIO)
status = I40E_ERR_UNKNOWN_PHY;		status = I40E_ERR_UNKNOWN_PHY;

if (report_init)		if (report_init) {
hw->phy.phy_types = LE32_TO_CPU(abilities->phy_type);		hw->phy.phy_types = LE32_TO_CPU(abilities->phy_type);
		hw->phy.phy_types \|= ((u64)abilities->phy_type_ext << 32);
		}

return status;		return status;
}		}

/**		/**
* i40e_aq_set_phy_config		* i40e_aq_set_phy_config
* @hw: pointer to the hw struct		* @hw: pointer to the hw struct
* @config: structure with PHY configuration to be set		* @config: structure with PHY configuration to be set
▲ Show 20 Lines • Show All 527 Lines • ▼ Show 20 Lines	enum i40e_status_code i40e_aq_set_default_vsi(struct i40e_hw *hw,
cmd->seid = CPU_TO_LE16(seid);		cmd->seid = CPU_TO_LE16(seid);

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);		status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

return status;		return status;
}		}

/**		/**
		* i40e_aq_clear_default_vsi
		* @hw: pointer to the hw struct
		* @seid: vsi number
		* @cmd_details: pointer to command details structure or NULL
		**/
		enum i40e_status_code i40e_aq_clear_default_vsi(struct i40e_hw *hw,
		u16 seid,
		struct i40e_asq_cmd_details *cmd_details)
		{
		struct i40e_aq_desc desc;
		struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
		(struct i40e_aqc_set_vsi_promiscuous_modes *)
		&desc.params.raw;
		enum i40e_status_code status;

		i40e_fill_default_direct_cmd_desc(&desc,
		i40e_aqc_opc_set_vsi_promiscuous_modes);

		cmd->promiscuous_flags = CPU_TO_LE16(0);
		cmd->valid_flags = CPU_TO_LE16(I40E_AQC_SET_VSI_DEFAULT);
		cmd->seid = CPU_TO_LE16(seid);

		status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

		return status;
		}

		/**
* i40e_aq_set_vsi_unicast_promiscuous		* i40e_aq_set_vsi_unicast_promiscuous
* @hw: pointer to the hw struct		* @hw: pointer to the hw struct
* @seid: vsi number		* @seid: vsi number
* @set: set unicast promiscuous enable/disable		* @set: set unicast promiscuous enable/disable
* @cmd_details: pointer to command details structure or NULL		* @cmd_details: pointer to command details structure or NULL
		* @rx_only_promisc: flag to decide if egress traffic gets mirrored in promisc
**/		**/
enum i40e_status_code i40e_aq_set_vsi_unicast_promiscuous(struct i40e_hw *hw,		enum i40e_status_code i40e_aq_set_vsi_unicast_promiscuous(struct i40e_hw *hw,
u16 seid, bool set,		u16 seid, bool set,
struct i40e_asq_cmd_details *cmd_details)		struct i40e_asq_cmd_details *cmd_details,
		bool rx_only_promisc)
{		{
struct i40e_aq_desc desc;		struct i40e_aq_desc desc;
struct i40e_aqc_set_vsi_promiscuous_modes *cmd =		struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
(struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;		(struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
enum i40e_status_code status;		enum i40e_status_code status;
u16 flags = 0;		u16 flags = 0;

i40e_fill_default_direct_cmd_desc(&desc,		i40e_fill_default_direct_cmd_desc(&desc,
i40e_aqc_opc_set_vsi_promiscuous_modes);		i40e_aqc_opc_set_vsi_promiscuous_modes);

if (set) {		if (set) {
flags \|= I40E_AQC_SET_VSI_PROMISC_UNICAST;		flags \|= I40E_AQC_SET_VSI_PROMISC_UNICAST;
if (((hw->aq.api_maj_ver == 1) && (hw->aq.api_min_ver >= 5)) \|\|		if (rx_only_promisc &&
(hw->aq.api_maj_ver > 1))		(((hw->aq.api_maj_ver == 1) && (hw->aq.api_min_ver >= 5)) \|\|
		(hw->aq.api_maj_ver > 1)))
flags \|= I40E_AQC_SET_VSI_PROMISC_TX;		flags \|= I40E_AQC_SET_VSI_PROMISC_TX;
}		}

cmd->promiscuous_flags = CPU_TO_LE16(flags);		cmd->promiscuous_flags = CPU_TO_LE16(flags);

cmd->valid_flags = CPU_TO_LE16(I40E_AQC_SET_VSI_PROMISC_UNICAST);		cmd->valid_flags = CPU_TO_LE16(I40E_AQC_SET_VSI_PROMISC_UNICAST);
if (((hw->aq.api_maj_ver >= 1) && (hw->aq.api_min_ver >= 5)) \|\|		if (((hw->aq.api_maj_ver >= 1) && (hw->aq.api_min_ver >= 5)) \|\|
(hw->aq.api_maj_ver > 1))		(hw->aq.api_maj_ver > 1))
▲ Show 20 Lines • Show All 156 Lines • ▼ Show 20 Lines	struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
(struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;		(struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
enum i40e_status_code status;		enum i40e_status_code status;
u16 flags = 0;		u16 flags = 0;

i40e_fill_default_direct_cmd_desc(&desc,		i40e_fill_default_direct_cmd_desc(&desc,
i40e_aqc_opc_set_vsi_promiscuous_modes);		i40e_aqc_opc_set_vsi_promiscuous_modes);
if (enable)		if (enable)
flags \|= I40E_AQC_SET_VSI_PROMISC_VLAN;		flags \|= I40E_AQC_SET_VSI_PROMISC_VLAN;

cmd->promiscuous_flags = CPU_TO_LE16(flags);		cmd->promiscuous_flags = CPU_TO_LE16(flags);
cmd->valid_flags = CPU_TO_LE16(I40E_AQC_SET_VSI_PROMISC_VLAN);		cmd->valid_flags = CPU_TO_LE16(I40E_AQC_SET_VSI_PROMISC_VLAN);
cmd->seid = CPU_TO_LE16(seid);		cmd->seid = CPU_TO_LE16(seid);

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);		status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

return status;		return status;
}		}
▲ Show 20 Lines • Show All 617 Lines • ▼ Show 20 Lines
* Delete a mirror rule. Mirror rules are supported for VEBs/VEPA elements only		* Delete a mirror rule. Mirror rules are supported for VEBs/VEPA elements only
**/		**/
enum i40e_status_code i40e_aq_delete_mirrorrule(struct i40e_hw *hw, u16 sw_seid,		enum i40e_status_code i40e_aq_delete_mirrorrule(struct i40e_hw *hw, u16 sw_seid,
u16 rule_type, u16 rule_id, u16 count, __le16 *mr_list,		u16 rule_type, u16 rule_id, u16 count, __le16 *mr_list,
struct i40e_asq_cmd_details *cmd_details,		struct i40e_asq_cmd_details *cmd_details,
u16 rules_used, u16 rules_free)		u16 rules_used, u16 rules_free)
{		{
/* Rule ID has to be valid except rule_type: INGRESS VLAN mirroring */		/* Rule ID has to be valid except rule_type: INGRESS VLAN mirroring */
if (rule_type != I40E_AQC_MIRROR_RULE_TYPE_VLAN) {		if (rule_type == I40E_AQC_MIRROR_RULE_TYPE_VLAN) {
if (!rule_id)
return I40E_ERR_PARAM;
} else {
/* count and mr_list shall be valid for rule_type INGRESS VLAN		/* count and mr_list shall be valid for rule_type INGRESS VLAN
* mirroring. For other rule_type, count and rule_type should		* mirroring. For other rule_type, count and rule_type should
* not matter.		* not matter.
*/		*/
if (count == 0 \|\| !mr_list)		if (count == 0 \|\| !mr_list)
return I40E_ERR_PARAM;		return I40E_ERR_PARAM;
}		}

▲ Show 20 Lines • Show All 180 Lines • ▼ Show 20 Lines	enum i40e_status_code i40e_aq_debug_write_register(struct i40e_hw *hw,
cmd->value_low = CPU_TO_LE32((u32)(reg_val & 0xFFFFFFFF));		cmd->value_low = CPU_TO_LE32((u32)(reg_val & 0xFFFFFFFF));

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);		status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

return status;		return status;
}		}

/**		/**
* i40e_aq_get_hmc_resource_profile
* @hw: pointer to the hw struct
* @profile: type of profile the HMC is to be set as
* @pe_vf_enabled_count: the number of PE enabled VFs the system has
* @cmd_details: pointer to command details structure or NULL
*
* query the HMC profile of the device.
**/
enum i40e_status_code i40e_aq_get_hmc_resource_profile(struct i40e_hw *hw,
enum i40e_aq_hmc_profile *profile,
u8 *pe_vf_enabled_count,
struct i40e_asq_cmd_details *cmd_details)
{
struct i40e_aq_desc desc;
struct i40e_aq_get_set_hmc_resource_profile *resp =
(struct i40e_aq_get_set_hmc_resource_profile *)&desc.params.raw;
enum i40e_status_code status;

i40e_fill_default_direct_cmd_desc(&desc,
i40e_aqc_opc_query_hmc_resource_profile);
status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

*profile = (enum i40e_aq_hmc_profile)(resp->pm_profile &
I40E_AQ_GET_HMC_RESOURCE_PROFILE_PM_MASK);
*pe_vf_enabled_count = resp->pe_vf_enabled &
I40E_AQ_GET_HMC_RESOURCE_PROFILE_COUNT_MASK;

return status;
}

/**
* i40e_aq_set_hmc_resource_profile
* @hw: pointer to the hw struct
* @profile: type of profile the HMC is to be set as
* @pe_vf_enabled_count: the number of PE enabled VFs the system has
* @cmd_details: pointer to command details structure or NULL
*
* set the HMC profile of the device.
**/
enum i40e_status_code i40e_aq_set_hmc_resource_profile(struct i40e_hw *hw,
enum i40e_aq_hmc_profile profile,
u8 pe_vf_enabled_count,
struct i40e_asq_cmd_details *cmd_details)
{
struct i40e_aq_desc desc;
struct i40e_aq_get_set_hmc_resource_profile *cmd =
(struct i40e_aq_get_set_hmc_resource_profile *)&desc.params.raw;
enum i40e_status_code status;

i40e_fill_default_direct_cmd_desc(&desc,
i40e_aqc_opc_set_hmc_resource_profile);

cmd->pm_profile = (u8)profile;
cmd->pe_vf_enabled = pe_vf_enabled_count;

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

return status;
}

/**
* i40e_aq_request_resource		* i40e_aq_request_resource
* @hw: pointer to the hw struct		* @hw: pointer to the hw struct
* @resource: resource id		* @resource: resource id
* @access: access type		* @access: access type
* @sdp_number: resource number		* @sdp_number: resource number
* @timeout: the maximum time in ms that the driver may hold the resource		* @timeout: the maximum time in ms that the driver may hold the resource
* @cmd_details: pointer to command details structure or NULL		* @cmd_details: pointer to command details structure or NULL
*		*
▲ Show 20 Lines • Show All 500 Lines • ▼ Show 20 Lines	case I40E_AQ_CAP_ID_FLOW_DIRECTOR:
break;		break;
case I40E_AQ_CAP_ID_WSR_PROT:		case I40E_AQ_CAP_ID_WSR_PROT:
p->wr_csr_prot = (u64)number;		p->wr_csr_prot = (u64)number;
p->wr_csr_prot \|= (u64)logical_id << 32;		p->wr_csr_prot \|= (u64)logical_id << 32;
i40e_debug(hw, I40E_DEBUG_INIT,		i40e_debug(hw, I40E_DEBUG_INIT,
"HW Capability: wr_csr_prot = 0x%llX\n\n",		"HW Capability: wr_csr_prot = 0x%llX\n\n",
(p->wr_csr_prot & 0xffff));		(p->wr_csr_prot & 0xffff));
break;		break;
		case I40E_AQ_CAP_ID_NVM_MGMT:
		if (number & I40E_NVM_MGMT_SEC_REV_DISABLED)
		p->sec_rev_disabled = TRUE;
		if (number & I40E_NVM_MGMT_UPDATE_DISABLED)
		p->update_disabled = TRUE;
		break;
		case I40E_AQ_CAP_ID_WOL_AND_PROXY:
		hw->num_wol_proxy_filters = (u16)number;
		hw->wol_proxy_vsi_seid = (u16)logical_id;
		p->apm_wol_support = phys_id & I40E_WOL_SUPPORT_MASK;
		if (phys_id & I40E_ACPI_PROGRAMMING_METHOD_MASK)
		p->acpi_prog_method = I40E_ACPI_PROGRAMMING_METHOD_AQC_FPK;
		else
		p->acpi_prog_method = I40E_ACPI_PROGRAMMING_METHOD_HW_FVL;
		p->proxy_support = (phys_id & I40E_PROXY_SUPPORT_MASK) ? 1 : 0;
		p->proxy_support = p->proxy_support;
		i40e_debug(hw, I40E_DEBUG_INIT,
		"HW Capability: WOL proxy filters = %d\n",
		hw->num_wol_proxy_filters);
		break;
default:		default:
break;		break;
}		}
}		}

if (p->fcoe)		if (p->fcoe)
i40e_debug(hw, I40E_DEBUG_ALL, "device is FCoE capable\n");		i40e_debug(hw, I40E_DEBUG_ALL, "device is FCoE capable\n");

▲ Show 20 Lines • Show All 1,592 Lines • ▼ Show 20 Lines	void i40e_add_filter_to_drop_tx_flow_control_frames(struct i40e_hw *hw,
status = i40e_aq_add_rem_control_packet_filter(hw, NULL, ethtype, flag,		status = i40e_aq_add_rem_control_packet_filter(hw, NULL, ethtype, flag,
seid, 0, TRUE, NULL,		seid, 0, TRUE, NULL,
NULL);		NULL);
if (status)		if (status)
DEBUGOUT("Ethtype Filter Add failed: Error pruning Tx flow control frames\n");		DEBUGOUT("Ethtype Filter Add failed: Error pruning Tx flow control frames\n");
}		}

/**		/**
		* i40e_fix_up_geneve_vni - adjust Geneve VNI for HW issue
		* @filters: list of cloud filters
		* @filter_count: length of list
		*
		* There's an issue in the device where the Geneve VNI layout needs
		* to be shifted 1 byte over from the VxLAN VNI
		**/
		static void i40e_fix_up_geneve_vni(
		struct i40e_aqc_add_remove_cloud_filters_element_data *filters,
		u8 filter_count)
		{
		struct i40e_aqc_add_remove_cloud_filters_element_data *f = filters;
		int i;

		for (i = 0; i < filter_count; i++) {
		u16 tnl_type;
		u32 ti;

		tnl_type = (LE16_TO_CPU(f[i].flags) &
		I40E_AQC_ADD_CLOUD_TNL_TYPE_MASK) >>
		I40E_AQC_ADD_CLOUD_TNL_TYPE_SHIFT;
		if (tnl_type == I40E_AQC_ADD_CLOUD_TNL_TYPE_GENEVE) {
		ti = LE32_TO_CPU(f[i].tenant_id);
		f[i].tenant_id = CPU_TO_LE32(ti << 8);
		}
		}
		}

		/**
* i40e_aq_add_cloud_filters		* i40e_aq_add_cloud_filters
* @hw: pointer to the hardware structure		* @hw: pointer to the hardware structure
* @seid: VSI seid to add cloud filters from		* @seid: VSI seid to add cloud filters from
* @filters: Buffer which contains the filters to be added		* @filters: Buffer which contains the filters to be added
* @filter_count: number of filters contained in the buffer		* @filter_count: number of filters contained in the buffer
*		*
* Set the cloud filters for a given VSI. The contents of the		* Set the cloud filters for a given VSI. The contents of the
* i40e_aqc_add_remove_cloud_filters_element_data are filled		* i40e_aqc_add_remove_cloud_filters_element_data are filled
* in by the caller of the function.		* in by the caller of the function.
*		*
**/		**/
enum i40e_status_code i40e_aq_add_cloud_filters(struct i40e_hw *hw,		enum i40e_status_code i40e_aq_add_cloud_filters(struct i40e_hw *hw,
u16 seid,		u16 seid,
struct i40e_aqc_add_remove_cloud_filters_element_data *filters,		struct i40e_aqc_add_remove_cloud_filters_element_data *filters,
u8 filter_count)		u8 filter_count)
{		{
struct i40e_aq_desc desc;		struct i40e_aq_desc desc;
struct i40e_aqc_add_remove_cloud_filters *cmd =		struct i40e_aqc_add_remove_cloud_filters *cmd =
(struct i40e_aqc_add_remove_cloud_filters *)&desc.params.raw;		(struct i40e_aqc_add_remove_cloud_filters *)&desc.params.raw;
u16 buff_len;
enum i40e_status_code status;		enum i40e_status_code status;
		u16 buff_len;

i40e_fill_default_direct_cmd_desc(&desc,		i40e_fill_default_direct_cmd_desc(&desc,
i40e_aqc_opc_add_cloud_filters);		i40e_aqc_opc_add_cloud_filters);

buff_len = filter_count * sizeof(*filters);		buff_len = filter_count * sizeof(*filters);
desc.datalen = CPU_TO_LE16(buff_len);		desc.datalen = CPU_TO_LE16(buff_len);
desc.flags \|= CPU_TO_LE16((u16)(I40E_AQ_FLAG_BUF \| I40E_AQ_FLAG_RD));		desc.flags \|= CPU_TO_LE16((u16)(I40E_AQ_FLAG_BUF \| I40E_AQ_FLAG_RD));
cmd->num_filters = filter_count;		cmd->num_filters = filter_count;
cmd->seid = CPU_TO_LE16(seid);		cmd->seid = CPU_TO_LE16(seid);

		i40e_fix_up_geneve_vni(filters, filter_count);

status = i40e_asq_send_command(hw, &desc, filters, buff_len, NULL);		status = i40e_asq_send_command(hw, &desc, filters, buff_len, NULL);

return status;		return status;
}		}

/**		/**
* i40e_aq_remove_cloud_filters		* i40e_aq_remove_cloud_filters
* @hw: pointer to the hardware structure		* @hw: pointer to the hardware structure
Show All 21 Lines	i40e_fill_default_direct_cmd_desc(&desc,
i40e_aqc_opc_remove_cloud_filters);		i40e_aqc_opc_remove_cloud_filters);

buff_len = filter_count * sizeof(*filters);		buff_len = filter_count * sizeof(*filters);
desc.datalen = CPU_TO_LE16(buff_len);		desc.datalen = CPU_TO_LE16(buff_len);
desc.flags \|= CPU_TO_LE16((u16)(I40E_AQ_FLAG_BUF \| I40E_AQ_FLAG_RD));		desc.flags \|= CPU_TO_LE16((u16)(I40E_AQ_FLAG_BUF \| I40E_AQ_FLAG_RD));
cmd->num_filters = filter_count;		cmd->num_filters = filter_count;
cmd->seid = CPU_TO_LE16(seid);		cmd->seid = CPU_TO_LE16(seid);

		i40e_fix_up_geneve_vni(filters, filter_count);

status = i40e_asq_send_command(hw, &desc, filters, buff_len, NULL);		status = i40e_asq_send_command(hw, &desc, filters, buff_len, NULL);

return status;		return status;
}		}

/**		/**
* i40e_aq_alternate_write		* i40e_aq_alternate_write
* @hw: pointer to the hardware structure		* @hw: pointer to the hardware structure
▲ Show 20 Lines • Show All 968 Lines • ▼ Show 20 Lines
* as none will be forthcoming. Immediately after calling this function,		* as none will be forthcoming. Immediately after calling this function,
* the admin queue should be shut down and (optionally) reinitialized.		* the admin queue should be shut down and (optionally) reinitialized.
**/		**/
enum i40e_status_code i40e_vf_reset(struct i40e_hw *hw)		enum i40e_status_code i40e_vf_reset(struct i40e_hw *hw)
{		{
return i40e_aq_send_msg_to_pf(hw, I40E_VIRTCHNL_OP_RESET_VF,		return i40e_aq_send_msg_to_pf(hw, I40E_VIRTCHNL_OP_RESET_VF,
I40E_SUCCESS, NULL, 0, NULL);		I40E_SUCCESS, NULL, 0, NULL);
}		}

		/**
		* i40e_aq_set_arp_proxy_config
		* @hw: pointer to the HW structure
		* @proxy_config - pointer to proxy config command table struct
		* @cmd_details: pointer to command details
		*
		* Set ARP offload parameters from pre-populated
		* i40e_aqc_arp_proxy_data struct
		**/
		enum i40e_status_code i40e_aq_set_arp_proxy_config(struct i40e_hw *hw,
		struct i40e_aqc_arp_proxy_data *proxy_config,
		struct i40e_asq_cmd_details *cmd_details)
		{
		struct i40e_aq_desc desc;
		enum i40e_status_code status;

		if (!proxy_config)
		return I40E_ERR_PARAM;

		i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_set_proxy_config);

		desc.params.external.addr_high =
		CPU_TO_LE32(I40E_HI_DWORD((u64)proxy_config));
		desc.params.external.addr_low =
		CPU_TO_LE32(I40E_LO_DWORD((u64)proxy_config));

		status = i40e_asq_send_command(hw, &desc, proxy_config,
		sizeof(struct i40e_aqc_arp_proxy_data),
		cmd_details);

		return status;
		}

		/**
		* i40e_aq_opc_set_ns_proxy_table_entry
		* @hw: pointer to the HW structure
		* @ns_proxy_table_entry: pointer to NS table entry command struct
		* @cmd_details: pointer to command details
		*
		* Set IPv6 Neighbor Solicitation (NS) protocol offload parameters
		* from pre-populated i40e_aqc_ns_proxy_data struct
		**/
		enum i40e_status_code i40e_aq_set_ns_proxy_table_entry(struct i40e_hw *hw,
		struct i40e_aqc_ns_proxy_data *ns_proxy_table_entry,
		struct i40e_asq_cmd_details *cmd_details)
		{
		struct i40e_aq_desc desc;
		enum i40e_status_code status;

		if (!ns_proxy_table_entry)
		return I40E_ERR_PARAM;

		i40e_fill_default_direct_cmd_desc(&desc,
		i40e_aqc_opc_set_ns_proxy_table_entry);

		desc.params.external.addr_high =
		CPU_TO_LE32(I40E_HI_DWORD((u64)ns_proxy_table_entry));
		desc.params.external.addr_low =
		CPU_TO_LE32(I40E_LO_DWORD((u64)ns_proxy_table_entry));

		status = i40e_asq_send_command(hw, &desc, ns_proxy_table_entry,
		sizeof(struct i40e_aqc_ns_proxy_data),
		cmd_details);

		return status;
		}

		/**
		* i40e_aq_set_clear_wol_filter
		* @hw: pointer to the hw struct
		* @filter_index: index of filter to modify (0-7)
		* @filter: buffer containing filter to be set
		* @set_filter: TRUE to set filter, FALSE to clear filter
		* @no_wol_tco: if TRUE, pass through packets cannot cause wake-up
		* if FALSE, pass through packets may cause wake-up
		* @filter_valid: TRUE if filter action is valid
		* @no_wol_tco_valid: TRUE if no WoL in TCO traffic action valid
		* @cmd_details: pointer to command details structure or NULL
		*
		* Set or clear WoL filter for port attached to the PF
		**/
		enum i40e_status_code i40e_aq_set_clear_wol_filter(struct i40e_hw *hw,
		u8 filter_index,
		struct i40e_aqc_set_wol_filter_data *filter,
		bool set_filter, bool no_wol_tco,
		bool filter_valid, bool no_wol_tco_valid,
		struct i40e_asq_cmd_details *cmd_details)
		{
		struct i40e_aq_desc desc;
		struct i40e_aqc_set_wol_filter *cmd =
		(struct i40e_aqc_set_wol_filter *)&desc.params.raw;
		enum i40e_status_code status;
		u16 cmd_flags = 0;
		u16 valid_flags = 0;
		u16 buff_len = 0;

		i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_set_wol_filter);

		if (filter_index >= I40E_AQC_MAX_NUM_WOL_FILTERS)
		return I40E_ERR_PARAM;
		cmd->filter_index = CPU_TO_LE16(filter_index);

		if (set_filter) {
		if (!filter)
		return I40E_ERR_PARAM;
		cmd_flags \|= I40E_AQC_SET_WOL_FILTER;
		buff_len = sizeof(*filter);
		}
		if (no_wol_tco)
		cmd_flags \|= I40E_AQC_SET_WOL_FILTER_NO_TCO_WOL;
		cmd->cmd_flags = CPU_TO_LE16(cmd_flags);

		if (filter_valid)
		valid_flags \|= I40E_AQC_SET_WOL_FILTER_ACTION_VALID;
		if (no_wol_tco_valid)
		valid_flags \|= I40E_AQC_SET_WOL_FILTER_NO_TCO_ACTION_VALID;
		cmd->valid_flags = CPU_TO_LE16(valid_flags);

		cmd->address_high = CPU_TO_LE32(I40E_HI_DWORD((u64)filter));
		cmd->address_low = CPU_TO_LE32(I40E_LO_DWORD((u64)filter));

		status = i40e_asq_send_command(hw, &desc, filter,
		buff_len, cmd_details);

		return status;
		}

		/**
		* i40e_aq_get_wake_event_reason
		* @hw: pointer to the hw struct
		* @wake_reason: return value, index of matching filter
		* @cmd_details: pointer to command details structure or NULL
		*
		* Get information for the reason of a Wake Up event
		**/
		enum i40e_status_code i40e_aq_get_wake_event_reason(struct i40e_hw *hw,
		u16 *wake_reason,
		struct i40e_asq_cmd_details *cmd_details)
		{
		struct i40e_aq_desc desc;
		struct i40e_aqc_get_wake_reason_completion *resp =
		(struct i40e_aqc_get_wake_reason_completion *)&desc.params.raw;
		enum i40e_status_code status;

		i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_get_wake_reason);

		status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

		if (status == I40E_SUCCESS)
		*wake_reason = LE16_TO_CPU(resp->wake_reason);

		return status;
		}