Differential D7328 Diff 18792 sys/dev/etherswitch/e6000sw/e6000swreg.h

Changeset View

Standalone View

sys/dev/etherswitch/e6000sw/e6000swreg.h

Show All 36 Lines	struct atu_opt {
uint16_t mac_45;		uint16_t mac_45;
uint16_t fid;		uint16_t fid;
};		};

/*		/*
* Definitions for the Marvell 88E6000 series Ethernet Switch.		* Definitions for the Marvell 88E6000 series Ethernet Switch.
*/		*/

#define CPU_PORT 0x5

/*		/*
* Switch Registers		* Switch Registers
*/		*/
#define REG_GLOBAL 0x1b		#define REG_GLOBAL 0x1b
#define REG_GLOBAL2 0x1c		#define REG_GLOBAL2 0x1c
#define REG_PORT(p) (0x10 + (p))		#define REG_PORT(p) (0x10 + (p))

#define REG_NUM_MAX 31		#define REG_NUM_MAX 31
▲ Show 20 Lines • Show All 107 Lines • ▼ Show 20 Lines
#define PHY_CMD_OPCODE_READ 2		#define PHY_CMD_OPCODE_READ 2
#define PHY_CMD_DEV_ADDR 5		#define PHY_CMD_DEV_ADDR 5
#define PHY_CMD_DEV_ADDR_MASK 0x3e0		#define PHY_CMD_DEV_ADDR_MASK 0x3e0
#define PHY_CMD_REG_ADDR 0		#define PHY_CMD_REG_ADDR 0
#define PHY_CMD_REG_ADDR_MASK 0x1f		#define PHY_CMD_REG_ADDR_MASK 0x1f

#define PHY_PAGE_REG 22		#define PHY_PAGE_REG 22

#define E6000SW_NUM_PHYS 5
#define E6000SW_NUM_PHY_REGS 29		#define E6000SW_NUM_PHY_REGS 29
#define E6000SW_CPUPORTS_MASK ((1 << 5) \| (1 << 6))
#define E6000SW_NUM_VGROUPS 8		#define E6000SW_NUM_VGROUPS 8
#define E6000SW_NUM_PORTS 7		#define E6000SW_MAX_PORTS 10
#define E6000SW_PORT_NO_VGROUP -1		#define E6000SW_PORT_NO_VGROUP -1
#define E6000SW_DEFAULT_AGETIME 20		#define E6000SW_DEFAULT_AGETIME 20
#define E6000SW_RETRIES 100		#define E6000SW_RETRIES 100
		#define E6000SW_SMI_TIMEOUT 16

/* Default vlangroups */
#define E6000SW_DEF_VLANGROUP0 (1 \| (1 << 1) \| (1 << 2) \| (1 << 3) \| \
(1 << 6))
#define E6000SW_DEF_VLANGROUP1 ((1 << 4) \| (1 << 5))

#endif /* _E6000SWREG_H_ */		#endif /* _E6000SWREG_H_ */