Differential D54881 Diff 175336 share/man/man4/intelpmc.4

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.\" SPDX-License-Identifier: BSD-2-Clause

This hyphen was for a long abandoned parser. I believe we have removed it from all our style guides, please let me know if this is not the case.

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.Dd February 23, 2026

Please consider using the consistent style in all our style guides which is blank comment, copyright, blank comment, spdx, blank comment.

ziaee: Please consider using the consistent style in all our style guides which is blank comment…

.Dd February 23, 2026

.Dt INTEL_PMC_CORE 4

.Os

.Sh NAME

.Nm intelpmc

.Nd Intel Power Management Controller Core driver

.Sh SYNOPSIS

To compile this driver into the kernel,

place the following lines in your

kernel configuration file:

.Bd -ragged -offset indent

.Cd "device intelpmc"

.Ed

.Pp

Alternatively, to load the driver as a

module at boot time, place the following line in

.Xr loader.conf 5 :

.Bd -literal -offset indent

intelpmc_load="YES"

.Ed

.Sh DESCRIPTION

ziaeeUnsubmitted

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.Sh SYNOPSIS

- To compile this driver into the kernel,

- place the following lines in your

- kernel configuration file:

- .Bd -ragged -offset indent

- .Cd "device intelpmc"

- .Ed

+ .Cd device intelpmc

.Pp

- Alternatively, to load the driver as a

- module at boot time, place the following line in

+ In

.Xr loader.conf 5 :

- .Bd -literal -offset indent

- intelpmc_load="YES"

- .Ed

+ .Cd intelpmc_load="YES"

.Sh DESCRIPTION

Optional: I proposed standardizing on this format on arch@ and in a BSDCan talk. We have nearly 200 manuals using this format, and it is more correct and consistent with the rest of the manual, as well as other BSDs, reinforcing the definition of SYNOPSIS to readers.

ziaee: Optional: I proposed standardizing on this format on arch@ and in a BSDCan talk. We have nearly…

The

.Nm

driver exposes sleep state residency counters and power gating status

for Intel Sunrise Point PCH (Platform Controller Hub) via

.Xr sysctl 8 .

.Pp

The driver supports debugging S0ix (Modern Standby) power states by

providing access to the cumulative time the system has spent in any

S0ix sub-state (S0i1, S0i2, S0i3).

.Pp

If firmware has locked access to the PMC registers, the driver detects

this condition at attach time and reports it via the

.Va access_denied

sysctl.

All register reads return zero when access is denied.

.Sh HARDWARE

The

.Nm

driver supports the following devices:

.Pp

ziaeeUnsubmitted

Done

.Sh HARDWARE

The

.Nm

- driver supports the following devices:

+ driver supports the following Power Management Controllers:

.Pp

.Bl -bullet -compact

This section will appear on it's own in the hardware release note, so it is important that we add the context of what the list we're starting is.

ziaee: This section will appear on it's own in the hardware release note, so it is important that we…

.Bl -bullet -compact

.It

Intel Sunrise Point-LP PMC (6th/7th Gen Core mobile, PCI ID 0x8086:0x9d21)

.It

Intel Sunrise Point-H PMC (6th/7th Gen Core desktop/server,

PCI ID 0x8086:0xa121)

.El

.Sh SYSCTLS

The following

.Xr sysctl 8

variables are available:

.Bl -tag -width indent

.It Va dev.intelpmc.%d.access_denied

Set to 1 if firmware has denied access to PMC registers.

.It Va dev.intelpmc.%d.slp_s0_residency

Cumulative time the PCH SLP_S0 signal was asserted, in microseconds

(100\ us per step).

SLP_S0 is asserted only when all of the following conditions are

met simultaneously: CPU in Package C10, PCH in low power mode,

ModPhy lanes power-gated, and PLLs idle.

This represents the deepest achievable S0ix platform state.

olceUnsubmitted

Not Done

Intel's documentation is less affirmative/detailed: SLP_S0# is asserted "when PCH is idle and processor is in C10 state", so I'd employ instead their exact terms, especially for the manual page.

olce: Intel's documentation is less affirmative/detailed: SLP_S0# is asserted "when PCH is idle and…

A value that never advances indicates S0ix transitions are not

occurring.

.It Va dev.intelpmc.%d.ltr_ignore

Latency Tolerance Reporting (LTR) ignore mask.

.It Va dev.intelpmc.%d.pm_cfg

Power Management configuration register (PM_CFG).

.It Va dev.intelpmc.%d.pm_sts

Power Management status register (PM_STS).

.El

.Sh SEE ALSO

.Xr acpi 4 ,

.Xr pci 4 ,

.Xr sysctl 8

.Pp

Intel 100 Series Chipset Family PCH Datasheet, Volume 2, Section 4.3.53.

.Sh HISTORY

The

.Nm

driver first appeared in

.Fx 16.0 .

.Sh AUTHORS

.An Abdelkader Boudih Aq Mt freebsd@seuros.com

.Sh CAVEATS

Only Sunrise Point PCH is supported.

Other PCH generations (Cannon Point, Tiger Lake, etc.) have different