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sys/dev/bhnd/cores/chipc/chipcvar.h
| Show First 20 Lines • Show All 53 Lines • ▼ Show 20 Lines | typedef enum { | ||||
| CHIPC_SFLASH_ST = 2, /**< ST serial flash */ | CHIPC_SFLASH_ST = 2, /**< ST serial flash */ | ||||
| CHIPC_SFLASH_AT = 3, /**< Atmel serial flash */ | CHIPC_SFLASH_AT = 3, /**< Atmel serial flash */ | ||||
| CHIPC_QSFLASH_ST = 4, /**< ST quad-SPI flash */ | CHIPC_QSFLASH_ST = 4, /**< ST quad-SPI flash */ | ||||
| CHIPC_QSFLASH_AT = 5, /**< Atmel quad-SPI flash */ | CHIPC_QSFLASH_AT = 5, /**< Atmel quad-SPI flash */ | ||||
| CHIPC_NFLASH = 6, /**< NAND flash */ | CHIPC_NFLASH = 6, /**< NAND flash */ | ||||
| CHIPC_NFLASH_4706 = 7 /**< BCM4706 NAND flash */ | CHIPC_NFLASH_4706 = 7 /**< BCM4706 NAND flash */ | ||||
| } chipc_flash; | } chipc_flash; | ||||
| const char *chipc_flash_name(chipc_flash type); | |||||
| const char *chipc_flash_bus_name(chipc_flash type); | |||||
| const char *chipc_sflash_device_name(chipc_flash type); | |||||
| /** | /** | ||||
| * ChipCommon capability flags; | * ChipCommon capability flags; | ||||
| */ | */ | ||||
| struct chipc_caps { | struct chipc_caps { | ||||
| uint8_t num_uarts; /**< Number of attached UARTS (1-3) */ | uint8_t num_uarts; /**< Number of attached UARTS (1-3) */ | ||||
| bool mipseb; /**< MIPS is big-endian */ | bool mipseb; /**< MIPS is big-endian */ | ||||
| uint8_t uart_clock; /**< UART clock source (see CHIPC_CAP_UCLKSEL_*) */ | uint8_t uart_clock; /**< UART clock source (see CHIPC_CAP_UCLKSEL_*) */ | ||||
| uint8_t uart_gpio; /**< UARTs own GPIO pins 12-15 */ | uint8_t uart_gpio; /**< UARTs own GPIO pins 12-15 */ | ||||
| uint8_t extbus_type; /**< ExtBus type (CHIPC_CAP_EXTBUS_*) */ | uint8_t extbus_type; /**< ExtBus type (CHIPC_CAP_EXTBUS_*) */ | ||||
| chipc_flash flash_type; /**< Flash type */ | |||||
| bhnd_nvram_src nvram_src; /**< identified NVRAM source */ | |||||
| chipc_flash flash_type; /**< flash type */ | |||||
| uint8_t cfi_width; /**< CFI bus width, 0 if unknown or CFI | |||||
| not present */ | |||||
| bhnd_nvram_src nvram_src; /**< identified NVRAM source */ | |||||
| bus_size_t sprom_offset; /**< Offset to SPROM data within | bus_size_t sprom_offset; /**< Offset to SPROM data within | ||||
| SPROM/OTP, 0 if unknown or not | SPROM/OTP, 0 if unknown or not | ||||
| present */ | present */ | ||||
| uint8_t otp_size; /**< OTP (row?) size, 0 if not present */ | uint8_t otp_size; /**< OTP (row?) size, 0 if not present */ | ||||
| uint8_t cfi_width; /**< CFI bus width, 0 if unknown or CFI | |||||
| not present */ | |||||
| uint8_t pll_type; /**< PLL type */ | uint8_t pll_type; /**< PLL type */ | ||||
| bool power_control; /**< Power control available */ | bool power_control; /**< Power control available */ | ||||
| bool jtag_master; /**< JTAG Master present */ | bool jtag_master; /**< JTAG Master present */ | ||||
| bool boot_rom; /**< Internal boot ROM is active */ | bool boot_rom; /**< Internal boot ROM is active */ | ||||
| uint8_t backplane_64; /**< Backplane supports 64-bit addressing. | uint8_t backplane_64; /**< Backplane supports 64-bit addressing. | ||||
| Note that this does not gaurantee | Note that this does not gaurantee | ||||
| the CPU itself supports 64-bit | the CPU itself supports 64-bit | ||||
| ▲ Show 20 Lines • Show All 106 Lines • ▼ Show 20 Lines | |||||
| * chipc driver instance state. | * chipc driver instance state. | ||||
| */ | */ | ||||
| struct chipc_softc { | struct chipc_softc { | ||||
| device_t dev; | device_t dev; | ||||
| struct bhnd_resource *core; /**< core registers. */ | struct bhnd_resource *core; /**< core registers. */ | ||||
| struct chipc_region *core_region; /**< region containing core registers */ | struct chipc_region *core_region; /**< region containing core registers */ | ||||
| struct bhnd_chipid ccid; /**< chip identification */ | |||||
| uint32_t quirks; /**< chipc quirk flags */ | uint32_t quirks; /**< chipc quirk flags */ | ||||
| struct chipc_caps caps; /**< chipc capabilities */ | struct chipc_caps caps; /**< chipc capabilities */ | ||||
| struct mtx mtx; /**< state mutex. */ | struct mtx mtx; /**< state mutex. */ | ||||
| size_t sprom_refcnt; /**< SPROM pin enable refcount */ | size_t sprom_refcnt; /**< SPROM pin enable refcount */ | ||||
| struct rman mem_rman; /**< port memory manager */ | struct rman mem_rman; /**< port memory manager */ | ||||
| STAILQ_HEAD(, chipc_region) mem_regions;/**< memory allocation records */ | STAILQ_HEAD(, chipc_region) mem_regions;/**< memory allocation records */ | ||||
| }; | }; | ||||
| Show All 10 Lines | |||||