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Differential D54922 Diff 171129 sys/dev/rge/if_rge.c

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sys/dev/rge/if_rge.c

Show First 20 Lines • Show All 417 Lines • ▼ Show 20 Lines case 0x64900000:
sc->rge_type = MAC_R26_1; sc->rge_type = MAC_R26_1;
// device_printf(dev, "RTL8126_1\n"); // device_printf(dev, "RTL8126_1\n");
break; break;
case 0x64a00000: case 0x64a00000:
sc->rge_type = MAC_R26_2; sc->rge_type = MAC_R26_2;
// device_printf(dev, "RTL8126_2\n"); // device_printf(dev, "RTL8126_2\n");
break; break;
case 0x68800000: case 0x68800000:
sc->rge_type = MAC_R25D; sc->rge_type = MAC_R25D_1;
// device_printf(dev, "RTL8125D\n"); // device_printf(dev, "RTL8125D_1\n");
break; break;
case 0x68900000:
sc->rge_type = MAC_R25D_2;
// device_printf(dev, "RTL8125D_2\n");
break;
case 0x6c900000: case 0x6c900000:
sc->rge_type = MAC_R27; sc->rge_type = MAC_R27;
// device_printf(dev, "RTL8127\n"); // device_printf(dev, "RTL8127\n");
break; break;
default: default:
RGE_PRINT_ERROR(sc, "unknown version 0x%08x\n", hwrev); RGE_PRINT_ERROR(sc, "unknown version 0x%08x\n", hwrev);
goto fail; goto fail;
} }
▲ Show 20 Lines • Show All 717 Lines • ▼ Show 20 Lines// RGE_PRINT_ERROR(sc, "%s: called whilst running?\n", __func__);
RGE_WRITE_4(sc, RGE_TXDESC_ADDR_HI, RGE_WRITE_4(sc, RGE_TXDESC_ADDR_HI,
RGE_ADDR_HI(q->q_tx.rge_tx_list_paddr)); RGE_ADDR_HI(q->q_tx.rge_tx_list_paddr));
/* Set the initial RX and TX configurations. */ /* Set the initial RX and TX configurations. */
if (sc->rge_type == MAC_R25) if (sc->rge_type == MAC_R25)
rxconf = RGE_RXCFG_CONFIG; rxconf = RGE_RXCFG_CONFIG;
else if (sc->rge_type == MAC_R25B) else if (sc->rge_type == MAC_R25B)
rxconf = RGE_RXCFG_CONFIG_8125B; rxconf = RGE_RXCFG_CONFIG_8125B;
else if (sc->rge_type == MAC_R25D) else if (RGE_TYPE_R25D(sc))
rxconf = RGE_RXCFG_CONFIG_8125D; rxconf = RGE_RXCFG_CONFIG_8125D;
else else
rxconf = RGE_RXCFG_CONFIG_8126; rxconf = RGE_RXCFG_CONFIG_8126;
RGE_WRITE_4(sc, RGE_RXCFG, rxconf); RGE_WRITE_4(sc, RGE_RXCFG, rxconf);
RGE_WRITE_4(sc, RGE_TXCFG, RGE_TXCFG_CONFIG); RGE_WRITE_4(sc, RGE_TXCFG, RGE_TXCFG_CONFIG);
val = rge_read_csi(sc, 0x70c) & ~0x3f000000; val = rge_read_csi(sc, 0x70c) & ~0x3f000000;
rge_write_csi(sc, 0x70c, val | 0x27000000); rge_write_csi(sc, 0x70c, val | 0x27000000);
if (RGE_TYPE_R26(sc) || sc->rge_type == MAC_R27) { if (RGE_TYPE_R26(sc) || sc->rge_type == MAC_R27) {
/* Disable L1 timeout. */ /* Disable L1 timeout. */
val = rge_read_csi(sc, 0x890) & ~0x00000001; val = rge_read_csi(sc, 0x890) & ~0x00000001;
rge_write_csi(sc, 0x890, val); rge_write_csi(sc, 0x890, val);
} else if (sc->rge_type != MAC_R25D) } else if (!RGE_TYPE_R25D(sc))
RGE_WRITE_2(sc, 0x0382, 0x221b); RGE_WRITE_2(sc, 0x0382, 0x221b);
RGE_WRITE_1(sc, RGE_RSS_CTRL, 0); RGE_WRITE_1(sc, RGE_RSS_CTRL, 0);
val = RGE_READ_2(sc, RGE_RXQUEUE_CTRL) & ~0x001c; val = RGE_READ_2(sc, RGE_RXQUEUE_CTRL) & ~0x001c;
RGE_WRITE_2(sc, RGE_RXQUEUE_CTRL, val | (fls(sc->sc_nqueues) - 1) << 2); RGE_WRITE_2(sc, RGE_RXQUEUE_CTRL, val | (fls(sc->sc_nqueues) - 1) << 2);
RGE_CLRBIT_1(sc, RGE_CFG1, RGE_CFG1_SPEED_DOWN); RGE_CLRBIT_1(sc, RGE_CFG1, RGE_CFG1_SPEED_DOWN);
Show All 9 Lines if (sc->rge_type == MAC_R27) {
RGE_CLRBIT_1(sc, 0x20e4, 0x04); RGE_CLRBIT_1(sc, 0x20e4, 0x04);
RGE_MAC_CLRBIT(sc, 0xe00c, 0x1000); RGE_MAC_CLRBIT(sc, 0xe00c, 0x1000);
RGE_MAC_CLRBIT(sc, 0xc0c2, 0x0040); RGE_MAC_CLRBIT(sc, 0xc0c2, 0x0040);
} }
} }
val = rge_read_mac_ocp(sc, 0xe614); val = rge_read_mac_ocp(sc, 0xe614);
val &= (sc->rge_type == MAC_R27) ? ~0x0f00 : ~0x0700; val &= (sc->rge_type == MAC_R27) ? ~0x0f00 : ~0x0700;
if (sc->rge_type == MAC_R25 || sc->rge_type == MAC_R25D) if (sc->rge_type == MAC_R25 || RGE_TYPE_R25D(sc))
rge_write_mac_ocp(sc, 0xe614, val | 0x0300); rge_write_mac_ocp(sc, 0xe614, val | 0x0300);
else if (sc->rge_type == MAC_R25B) else if (sc->rge_type == MAC_R25B)
rge_write_mac_ocp(sc, 0xe614, val | 0x0200); rge_write_mac_ocp(sc, 0xe614, val | 0x0200);
else if (RGE_TYPE_R26(sc)) else if (RGE_TYPE_R26(sc))
rge_write_mac_ocp(sc, 0xe614, val | 0x0300); rge_write_mac_ocp(sc, 0xe614, val | 0x0300);
else else
rge_write_mac_ocp(sc, 0xe614, val | 0x0f00); rge_write_mac_ocp(sc, 0xe614, val | 0x0f00);
Show All 19 Lines// RGE_PRINT_ERROR(sc, "%s: called whilst running?\n", __func__);
RGE_WRITE_1(sc, RGE_TDFNR, 0x10); RGE_WRITE_1(sc, RGE_TDFNR, 0x10);
RGE_MAC_CLRBIT(sc, 0xe040, 0x1000); RGE_MAC_CLRBIT(sc, 0xe040, 0x1000);
val = rge_read_mac_ocp(sc, 0xea1c) & ~0x0003; val = rge_read_mac_ocp(sc, 0xea1c) & ~0x0003;
rge_write_mac_ocp(sc, 0xea1c, val | 0x0001); rge_write_mac_ocp(sc, 0xea1c, val | 0x0001);
if (sc->rge_type == MAC_R25D) if (RGE_TYPE_R25D(sc))
rge_write_mac_ocp(sc, 0xe0c0, 0x4403); rge_write_mac_ocp(sc, 0xe0c0, 0x4403);
else else
rge_write_mac_ocp(sc, 0xe0c0, 0x4000); rge_write_mac_ocp(sc, 0xe0c0, 0x4000);
RGE_MAC_SETBIT(sc, 0xe052, 0x0060); RGE_MAC_SETBIT(sc, 0xe052, 0x0060);
RGE_MAC_CLRBIT(sc, 0xe052, 0x0088); RGE_MAC_CLRBIT(sc, 0xe052, 0x0088);
val = rge_read_mac_ocp(sc, 0xd430) & ~0x0fff; val = rge_read_mac_ocp(sc, 0xd430) & ~0x0fff;
rge_write_mac_ocp(sc, 0xd430, val | 0x045f); rge_write_mac_ocp(sc, 0xd430, val | 0x045f);
RGE_SETBIT_1(sc, RGE_DLLPR, RGE_DLLPR_PFM_EN | RGE_DLLPR_TX_10M_PS_EN); RGE_SETBIT_1(sc, RGE_DLLPR, RGE_DLLPR_PFM_EN | RGE_DLLPR_TX_10M_PS_EN);
if (sc->rge_type == MAC_R25) if (sc->rge_type == MAC_R25)
RGE_SETBIT_1(sc, RGE_MCUCMD, 0x01); RGE_SETBIT_1(sc, RGE_MCUCMD, 0x01);
if (sc->rge_type != MAC_R25D) { if (!RGE_TYPE_R25D(sc)) {
/* Disable EEE plus. */ /* Disable EEE plus. */
RGE_MAC_CLRBIT(sc, 0xe080, 0x0002); RGE_MAC_CLRBIT(sc, 0xe080, 0x0002);
} }
if (RGE_TYPE_R26(sc) || sc->rge_type == MAC_R27) if (RGE_TYPE_R26(sc) || sc->rge_type == MAC_R27)
RGE_MAC_CLRBIT(sc, 0xea1c, 0x0304); RGE_MAC_CLRBIT(sc, 0xea1c, 0x0304);
else else
RGE_MAC_CLRBIT(sc, 0xea1c, 0x0004); RGE_MAC_CLRBIT(sc, 0xea1c, 0x0004);
Show All 38 Lines// RGE_PRINT_ERROR(sc, "%s: called whilst running?\n", __func__);
RGE_MAC_SETBIT(sc, 0xc0ac, 0x1f80); RGE_MAC_SETBIT(sc, 0xc0ac, 0x1f80);
rge_write_mac_ocp(sc, 0xe098, 0xc302); rge_write_mac_ocp(sc, 0xe098, 0xc302);
RGE_MAC_CLRBIT(sc, 0xe032, 0x0003); RGE_MAC_CLRBIT(sc, 0xe032, 0x0003);
val = rge_read_csi(sc, 0x98) & ~0x0000ff00; val = rge_read_csi(sc, 0x98) & ~0x0000ff00;
rge_write_csi(sc, 0x98, val); rge_write_csi(sc, 0x98, val);
if (sc->rge_type == MAC_R25D) { if (RGE_TYPE_R25D(sc)) {
val = rge_read_mac_ocp(sc, 0xe092) & ~0x00ff; val = rge_read_mac_ocp(sc, 0xe092) & ~0x00ff;
rge_write_mac_ocp(sc, 0xe092, val | 0x0008); rge_write_mac_ocp(sc, 0xe092, val | 0x0008);
} else } else
RGE_MAC_CLRBIT(sc, 0xe092, 0x00ff); RGE_MAC_CLRBIT(sc, 0xe092, 0x00ff);
/* Enable/disable HW VLAN tagging based on enabled capability */ /* Enable/disable HW VLAN tagging based on enabled capability */
if ((if_getcapabilities(sc->sc_ifp) & IFCAP_VLAN_HWTAGGING) != 0) if ((if_getcapabilities(sc->sc_ifp) & IFCAP_VLAN_HWTAGGING) != 0)
RGE_SETBIT_4(sc, RGE_RXCFG, RGE_RXCFG_VLANSTRIP); RGE_SETBIT_4(sc, RGE_RXCFG, RGE_RXCFG_VLANSTRIP);
▲ Show 20 Lines • Show All 1,371 Lines • Show Last 20 Lines