Changeset View
Changeset View
Standalone View
Standalone View
sys/x86/cpufreq/hwpstate_amd.c
| Show First 20 Lines • Show All 427 Lines • ▼ Show 20 Lines | set_cppc_request(device_t hwp_dev, uint64_t request, uint64_t mask) | ||||
| return (error); | return (error); | ||||
| } | } | ||||
| static int | static int | ||||
| sysctl_epp_handler(SYSCTL_HANDLER_ARGS) | sysctl_epp_handler(SYSCTL_HANDLER_ARGS) | ||||
| { | { | ||||
| const u_int max_epp = | const u_int max_epp = | ||||
| BITS_VALUE(AMD_CPPC_REQUEST_EPP_BITS, (uint64_t)-1); | BITS_VALUE(AMD_CPPC_REQUEST_EPP_BITS, (uint64_t)-1); | ||||
| const device_t dev = oidp->oid_arg1; | const device_t dev = arg1; | ||||
| struct hwpstate_softc *const sc = device_get_softc(dev); | struct hwpstate_softc *const sc = device_get_softc(dev); | ||||
| u_int val; | u_int val; | ||||
| int error = 0; | int error; | ||||
| /* Sysctl knob does not exist if PSTATE_CPPC is not set. */ | /* Sysctl knob does not exist if PSTATE_CPPC is not set. */ | ||||
| check_cppc_enabled(sc, __func__); | check_cppc_enabled(sc, __func__); | ||||
| val = BITS_VALUE(AMD_CPPC_REQUEST_EPP_BITS, sc->cppc.request) * 100 / | val = BITS_VALUE(AMD_CPPC_REQUEST_EPP_BITS, sc->cppc.request); | ||||
| max_epp; | |||||
| error = sysctl_handle_int(oidp, &val, 0, req); | error = sysctl_handle_int(oidp, &val, 0, req); | ||||
| if (error != 0 || req->newptr == NULL) | if (error != 0 || req->newptr == NULL) | ||||
| goto end; | return (error); | ||||
| if (val > 100) { | |||||
| error = EINVAL; | |||||
| goto end; | |||||
| } | |||||
| val = (val * max_epp) / 100; | |||||
| if (val > max_epp) | |||||
| return (EINVAL); | |||||
| error = set_cppc_request(dev, | error = set_cppc_request(dev, | ||||
| BITS_WITH_VALUE(AMD_CPPC_REQUEST_EPP_BITS, val), | BITS_WITH_VALUE(AMD_CPPC_REQUEST_EPP_BITS, val), | ||||
| BITS_WITH_VALUE(AMD_CPPC_REQUEST_EPP_BITS, -1)); | BITS_WITH_VALUE(AMD_CPPC_REQUEST_EPP_BITS, -1)); | ||||
| end: | |||||
| return (error); | return (error); | ||||
| } | } | ||||
| static driver_t hwpstate_driver = { | static driver_t hwpstate_driver = { | ||||
| HWP_AMD_CLASSNAME, | HWP_AMD_CLASSNAME, | ||||
| hwpstate_methods, | hwpstate_methods, | ||||
| sizeof(struct hwpstate_softc), | sizeof(struct hwpstate_softc), | ||||
| }; | }; | ||||
| ▲ Show 20 Lines • Show All 456 Lines • ▼ Show 20 Lines | SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), | ||||
| CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_SKIP | CTLFLAG_MPSAFE, | CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_SKIP | CTLFLAG_MPSAFE, | ||||
| sc, 0, sysctl_cppc_dump_handler, "A", ""); | sc, 0, sysctl_cppc_dump_handler, "A", ""); | ||||
| SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), | SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), | ||||
| SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, | SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, | ||||
| "epp", CTLTYPE_UINT | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, dev, 0, | "epp", CTLTYPE_UINT | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, dev, 0, | ||||
| sysctl_epp_handler, "IU", | sysctl_epp_handler, "IU", | ||||
| "Efficiency/Performance Preference " | "Efficiency/Performance Preference " | ||||
| "(range from 0, most performant, through 100, most efficient)"); | "(range from 0, most performant, through 255, most efficient)"); | ||||
| } | } | ||||
| return (cpufreq_register(dev)); | return (cpufreq_register(dev)); | ||||
| } | } | ||||
| static int | static int | ||||
| hwpstate_get_info_from_msr(device_t dev) | hwpstate_get_info_from_msr(device_t dev) | ||||
| { | { | ||||
| struct hwpstate_softc *sc; | struct hwpstate_softc *sc; | ||||
| ▲ Show 20 Lines • Show All 160 Lines • Show Last 20 Lines | |||||