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usr.sbin/bhyve/pci_emul.c
| Show First 20 Lines • Show All 81 Lines • ▼ Show 20 Lines | struct funcinfo { | ||||
| struct pci_devinst *fi_devi; | struct pci_devinst *fi_devi; | ||||
| }; | }; | ||||
| struct intxinfo { | struct intxinfo { | ||||
| int ii_count; | int ii_count; | ||||
| struct pci_irq ii_irq; | struct pci_irq ii_irq; | ||||
| }; | }; | ||||
| enum slottype { | |||||
| PCI_SLOT_HP_EMPTY, | |||||
| PCI_SLOT_HP_ACTIVE, | |||||
| PCI_SLOT_FIXED, | |||||
| }; | |||||
| struct slotinfo { | struct slotinfo { | ||||
| struct intxinfo si_intpins[4]; | struct intxinfo si_intpins[4]; | ||||
| struct funcinfo si_funcs[MAXFUNCS]; | struct funcinfo si_funcs[MAXFUNCS]; | ||||
| enum slottype si_type; | |||||
| }; | }; | ||||
| struct businfo { | struct businfo { | ||||
| uint16_t iobase, iolimit; /* I/O window */ | uint16_t iobase, iolimit; /* I/O window */ | ||||
| uint32_t membase32, memlimit32; /* mmio window below 4GB */ | uint32_t membase32, memlimit32; /* mmio window below 4GB */ | ||||
| uint64_t membase64, memlimit64; /* mmio window above 4GB */ | uint64_t membase64, memlimit64; /* mmio window above 4GB */ | ||||
| struct slotinfo slotinfo[MAXSLOTS]; | struct slotinfo slotinfo[MAXSLOTS]; | ||||
| vmem_t *resources[PCIBAR_MAX]; | vmem_t *resources[PCIBAR_MAX]; | ||||
| ▲ Show 20 Lines • Show All 1,486 Lines • ▼ Show 20 Lines | for (bus = 0; bus < MAXBUSES; bus++) { | ||||
| assert(bi->resources[PCIBAR_MEM32] != NULL); | assert(bi->resources[PCIBAR_MEM32] != NULL); | ||||
| bi->resources[PCIBAR_MEM64] = vmem_create("mem64", | bi->resources[PCIBAR_MEM64] = vmem_create("mem64", | ||||
| bi->membase64, mem64_quantum, 0, 0, 0); | bi->membase64, mem64_quantum, 0, 0, 0); | ||||
| assert(bi->resources[PCIBAR_MEM64] != NULL); | assert(bi->resources[PCIBAR_MEM64] != NULL); | ||||
| /* first run: init devices */ | /* first run: init devices */ | ||||
| for (slot = 0; slot < MAXSLOTS; slot++) { | for (slot = 0; slot < MAXSLOTS; slot++) { | ||||
| si = &bi->slotinfo[slot]; | si = &bi->slotinfo[slot]; | ||||
| si->si_type = PCI_SLOT_HP_EMPTY; | |||||
| for (func = 0; func < MAXFUNCS; func++) { | for (func = 0; func < MAXFUNCS; func++) { | ||||
| fi = &si->si_funcs[func]; | fi = &si->si_funcs[func]; | ||||
| snprintf(node_name, sizeof(node_name), | snprintf(node_name, sizeof(node_name), | ||||
| "pci.%d.%d.%d", bus, slot, func); | "pci.%d.%d.%d", bus, slot, func); | ||||
| nvl = find_config_node(node_name); | nvl = find_config_node(node_name); | ||||
| if (nvl == NULL) | if (nvl == NULL) | ||||
| continue; | continue; | ||||
| Show All 18 Lines | for (slot = 0; slot < MAXSLOTS; slot++) { | ||||
| pde->pe_alias); | pde->pe_alias); | ||||
| return (EINVAL); | return (EINVAL); | ||||
| } | } | ||||
| fi->fi_pde = pde; | fi->fi_pde = pde; | ||||
| error = pci_emul_init(ctx, pde, bus, slot, | error = pci_emul_init(ctx, pde, bus, slot, | ||||
| func, fi); | func, fi); | ||||
| if (error) | if (error) | ||||
| return (error); | return (error); | ||||
| si->si_type = PCI_SLOT_FIXED; | |||||
| } | } | ||||
| } | } | ||||
| /* second run: assign BARs and free list */ | /* second run: assign BARs and free list */ | ||||
| struct pci_bar_allocation *bar; | struct pci_bar_allocation *bar; | ||||
| struct pci_bar_allocation *bar_tmp; | struct pci_bar_allocation *bar_tmp; | ||||
| TAILQ_FOREACH_SAFE(bar, &pci_bars, chain, bar_tmp) { | TAILQ_FOREACH_SAFE(bar, &pci_bars, chain, bar_tmp) { | ||||
| pci_emul_assign_bar(bar->pdi, bar->idx, bar->type, | pci_emul_assign_bar(bar->pdi, bar->idx, bar->type, | ||||
| ▲ Show 20 Lines • Show All 1,192 Lines • Show Last 20 Lines | |||||