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sys/dev/gve/gve_adminq.c
| Show First 20 Lines • Show All 290 Lines • ▼ Show 20 Lines | gve_adminq_create_rx_queue(struct gve_priv *priv, uint32_t queue_index) | ||||
| bus_dmamap_sync(qres_dma->tag, qres_dma->map, BUS_DMASYNC_PREREAD); | bus_dmamap_sync(qres_dma->tag, qres_dma->map, BUS_DMASYNC_PREREAD); | ||||
| cmd.opcode = htobe32(GVE_ADMINQ_CREATE_RX_QUEUE); | cmd.opcode = htobe32(GVE_ADMINQ_CREATE_RX_QUEUE); | ||||
| cmd.create_rx_queue = (struct gve_adminq_create_rx_queue) { | cmd.create_rx_queue = (struct gve_adminq_create_rx_queue) { | ||||
| .queue_id = htobe32(queue_index), | .queue_id = htobe32(queue_index), | ||||
| .ntfy_id = htobe32(rx->com.ntfy_id), | .ntfy_id = htobe32(rx->com.ntfy_id), | ||||
| .queue_resources_addr = htobe64(qres_dma->bus_addr), | .queue_resources_addr = htobe64(qres_dma->bus_addr), | ||||
| .rx_ring_size = htobe16(priv->rx_desc_cnt), | .rx_ring_size = htobe16(priv->rx_desc_cnt), | ||||
| .packet_buffer_size = htobe16(GVE_DEFAULT_RX_BUFFER_SIZE), | |||||
| }; | }; | ||||
| if (gve_is_gqi(priv)) { | if (gve_is_gqi(priv)) { | ||||
| cmd.create_rx_queue.rx_desc_ring_addr = | cmd.create_rx_queue.rx_desc_ring_addr = | ||||
| htobe64(rx->desc_ring_mem.bus_addr); | htobe64(rx->desc_ring_mem.bus_addr); | ||||
| cmd.create_rx_queue.rx_data_ring_addr = | cmd.create_rx_queue.rx_data_ring_addr = | ||||
| htobe64(rx->data_ring_mem.bus_addr); | htobe64(rx->data_ring_mem.bus_addr); | ||||
| cmd.create_rx_queue.index = | cmd.create_rx_queue.index = | ||||
| htobe32(queue_index); | htobe32(queue_index); | ||||
| cmd.create_rx_queue.queue_page_list_id = | cmd.create_rx_queue.queue_page_list_id = | ||||
| htobe32((rx->com.qpl)->id); | htobe32((rx->com.qpl)->id); | ||||
| cmd.create_rx_queue.packet_buffer_size = | |||||
| htobe16(GVE_DEFAULT_RX_BUFFER_SIZE); | |||||
| } else { | } else { | ||||
| cmd.create_rx_queue.queue_page_list_id = | cmd.create_rx_queue.queue_page_list_id = | ||||
| htobe32(GVE_RAW_ADDRESSING_QPL_ID); | htobe32(GVE_RAW_ADDRESSING_QPL_ID); | ||||
| cmd.create_rx_queue.rx_desc_ring_addr = | cmd.create_rx_queue.rx_desc_ring_addr = | ||||
| htobe64(rx->dqo.compl_ring_mem.bus_addr); | htobe64(rx->dqo.compl_ring_mem.bus_addr); | ||||
| cmd.create_rx_queue.rx_data_ring_addr = | cmd.create_rx_queue.rx_data_ring_addr = | ||||
| htobe64(rx->desc_ring_mem.bus_addr); | htobe64(rx->desc_ring_mem.bus_addr); | ||||
| cmd.create_rx_queue.rx_buff_ring_size = | cmd.create_rx_queue.rx_buff_ring_size = | ||||
| htobe16(priv->rx_desc_cnt); | htobe16(priv->rx_desc_cnt); | ||||
| cmd.create_rx_queue.enable_rsc = | cmd.create_rx_queue.enable_rsc = | ||||
| !!((if_getcapenable(priv->ifp) & IFCAP_LRO) && | !!((if_getcapenable(priv->ifp) & IFCAP_LRO) && | ||||
| !gve_disable_hw_lro); | !gve_disable_hw_lro); | ||||
| cmd.create_rx_queue.packet_buffer_size = | |||||
| htobe16(priv->rx_buf_size_dqo); | |||||
| } | } | ||||
| return (gve_adminq_execute_cmd(priv, &cmd)); | return (gve_adminq_execute_cmd(priv, &cmd)); | ||||
| } | } | ||||
| int | int | ||||
| gve_adminq_create_rx_queues(struct gve_priv *priv, uint32_t num_queues) | gve_adminq_create_rx_queues(struct gve_priv *priv, uint32_t num_queues) | ||||
| { | { | ||||
| ▲ Show 20 Lines • Show All 659 Lines • Show Last 20 Lines | |||||