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Differential D6393 Diff 16449 head/sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c

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head/sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c

Show First 20 Lines • Show All 113 Lines • ▼ Show 20 Linesmtkswitch_phy_write(device_t dev, int phy, int reg, int val)
return (res); return (res);
} }
static uint32_t static uint32_t
mtkswitch_reg_read32(struct mtkswitch_softc *sc, int reg) mtkswitch_reg_read32(struct mtkswitch_softc *sc, int reg)
{ {
MTKSWITCH_LOCK_ASSERT(sc, MA_OWNED);
return (MTKSWITCH_READ(sc, reg)); return (MTKSWITCH_READ(sc, reg));
} }
static uint32_t static uint32_t
mtkswitch_reg_write32(struct mtkswitch_softc *sc, int reg, uint32_t val) mtkswitch_reg_write32(struct mtkswitch_softc *sc, int reg, uint32_t val)
{ {
MTKSWITCH_LOCK_ASSERT(sc, MA_OWNED);
MTKSWITCH_WRITE(sc, reg, val); MTKSWITCH_WRITE(sc, reg, val);
return (0); return (0);
} }
static uint32_t static uint32_t
mtkswitch_reg_read32_mt7621(struct mtkswitch_softc *sc, int reg) mtkswitch_reg_read32_mt7621(struct mtkswitch_softc *sc, int reg)
{ {
uint32_t low, hi; uint32_t low, hi;
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static void static void
mtkswitch_port_init(struct mtkswitch_softc *sc, int port) mtkswitch_port_init(struct mtkswitch_softc *sc, int port)
{ {
uint32_t val; uint32_t val;
/* Called early and hence unlocked */ /* Called early and hence unlocked */
/* Set the port to secure mode */ /* Set the port to secure mode */
sc->hal.mtkswitch_write(sc, MTKSWITCH_PCR(port), PCR_PORT_VLAN_SECURE); val = sc->hal.mtkswitch_read(sc, MTKSWITCH_PCR(port));
val |= PCR_PORT_VLAN_SECURE;
sc->hal.mtkswitch_write(sc, MTKSWITCH_PCR(port), val);
/* Set port's vlan_attr to user port */ /* Set port's vlan_attr to user port */
val = sc->hal.mtkswitch_read(sc, MTKSWITCH_PVC(port)); val = sc->hal.mtkswitch_read(sc, MTKSWITCH_PVC(port));
val &= PVC_VLAN_ATTR_MASK; val &= ~PVC_VLAN_ATTR_MASK;
sc->hal.mtkswitch_write(sc, MTKSWITCH_PVC(port), val); sc->hal.mtkswitch_write(sc, MTKSWITCH_PVC(port), val);
val = PMCR_CFG_DEFAULT;
if (port == sc->cpuport)
val |= PMCR_FORCE_LINK | PMCR_FORCE_DPX | PMCR_FORCE_SPD_1000 |
PMCR_FORCE_MODE;
/* Set port's MAC to default settings */ /* Set port's MAC to default settings */
sc->hal.mtkswitch_write(sc, MTKSWITCH_PMCR(port), PMCR_CFG_DEFAULT); sc->hal.mtkswitch_write(sc, MTKSWITCH_PMCR(port), val);
} }
static uint32_t static uint32_t
mtkswitch_get_port_status(struct mtkswitch_softc *sc, int port) mtkswitch_get_port_status(struct mtkswitch_softc *sc, int port)
{ {
uint32_t val, res, tmp; uint32_t val, res, tmp;
MTKSWITCH_LOCK_ASSERT(sc, MA_OWNED); MTKSWITCH_LOCK_ASSERT(sc, MA_OWNED);
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static void static void
mtkswitch_vlan_init_hw(struct mtkswitch_softc *sc) mtkswitch_vlan_init_hw(struct mtkswitch_softc *sc)
{ {
uint32_t val, vid, i; uint32_t val, vid, i;
MTKSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED); MTKSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
MTKSWITCH_LOCK(sc); MTKSWITCH_LOCK(sc);
/* Reset all VLANs to defaults first */ /* Reset all VLANs to defaults first */
for (i = 0; i < sc->info.es_nvlangroups; i++) { for (i = 0; i < sc->info.es_nvlangroups; i++) {
mtkswitch_invalidate_vlan(sc, i); mtkswitch_invalidate_vlan(sc, i);
if (sc->sc_switchtype == MTK_SWITCH_MT7620) { if (sc->sc_switchtype == MTK_SWITCH_MT7620) {
val = sc->hal.mtkswitch_read(sc, MTKSWITCH_VTIM(i)); val = sc->hal.mtkswitch_read(sc, MTKSWITCH_VTIM(i));
val &= (VTIM_MASK << VTIM_OFF(i)); val &= ~(VTIM_MASK << VTIM_OFF(i));
val |= ((i + 1) << VTIM_OFF(i)); val |= ((i + 1) << VTIM_OFF(i));
sc->hal.mtkswitch_write(sc, MTKSWITCH_VTIM(i), val); sc->hal.mtkswitch_write(sc, MTKSWITCH_VTIM(i), val);
} }
} }
/* Now, add all ports as untagged members of VLAN 1 */ /* Now, add all ports as untagged members of VLAN 1 */
if (sc->sc_switchtype == MTK_SWITCH_MT7620) { if (sc->sc_switchtype == MTK_SWITCH_MT7620) {
/* MT7620 uses vid index instead of actual vid */ /* MT7620 uses vid index instead of actual vid */
▲ Show 20 Lines • Show All 88 Lines • ▼ Show 20 Linesmtkswitch_vlan_setvgroup(struct mtkswitch_softc *sc, etherswitch_vlangroup_t *v)
if (v->es_fid != 0) if (v->es_fid != 0)
return (EINVAL); return (EINVAL);
MTKSWITCH_LOCK(sc); MTKSWITCH_LOCK(sc);
while (sc->hal.mtkswitch_read(sc, MTKSWITCH_VTCR) & VTCR_BUSY); while (sc->hal.mtkswitch_read(sc, MTKSWITCH_VTCR) & VTCR_BUSY);
if (sc->sc_switchtype == MTK_SWITCH_MT7620) { if (sc->sc_switchtype == MTK_SWITCH_MT7620) {
val = sc->hal.mtkswitch_read(sc, val = sc->hal.mtkswitch_read(sc,
MTKSWITCH_VTIM(v->es_vlangroup)); MTKSWITCH_VTIM(v->es_vlangroup));
val &= (VTIM_MASK << VTIM_OFF(v->es_vlangroup)); val &= ~(VTIM_MASK << VTIM_OFF(v->es_vlangroup));
val |= ((v->es_vid & VTIM_MASK) << VTIM_OFF(v->es_vlangroup)); val |= ((v->es_vid & VTIM_MASK) << VTIM_OFF(v->es_vlangroup));
sc->hal.mtkswitch_write(sc, MTKSWITCH_VTIM(v->es_vlangroup), sc->hal.mtkswitch_write(sc, MTKSWITCH_VTIM(v->es_vlangroup),
val); val);
vid = v->es_vlangroup; vid = v->es_vlangroup;
} else } else
vid = v->es_vid; vid = v->es_vid;
/* We use FID 0 */ /* We use FID 0 */
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