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head/sys/dev/ixl/ixl_txrx.c
Show First 20 Lines • Show All 280 Lines • ▼ Show 20 Lines | ixl_xmit(struct ixl_queue *que, struct mbuf **m_headp) | ||||
* Map the packet for DMA. | * Map the packet for DMA. | ||||
*/ | */ | ||||
error = bus_dmamap_load_mbuf_sg(tag, map, | error = bus_dmamap_load_mbuf_sg(tag, map, | ||||
*m_headp, segs, &nsegs, BUS_DMA_NOWAIT); | *m_headp, segs, &nsegs, BUS_DMA_NOWAIT); | ||||
if (error == EFBIG) { | if (error == EFBIG) { | ||||
struct mbuf *m; | struct mbuf *m; | ||||
m = m_defrag(*m_headp, M_NOWAIT); | m = m_collapse(*m_headp, M_NOWAIT, maxsegs); | ||||
if (m == NULL) { | if (m == NULL) { | ||||
que->mbuf_defrag_failed++; | que->mbuf_defrag_failed++; | ||||
m_freem(*m_headp); | m_freem(*m_headp); | ||||
*m_headp = NULL; | *m_headp = NULL; | ||||
return (ENOBUFS); | return (ENOBUFS); | ||||
} | } | ||||
*m_headp = m; | *m_headp = m; | ||||
▲ Show 20 Lines • Show All 87 Lines • ▼ Show 20 Lines | buf->eop_index = last; | ||||
BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); | BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); | ||||
/* | /* | ||||
* Advance the Transmit Descriptor Tail (Tdt), this tells the | * Advance the Transmit Descriptor Tail (Tdt), this tells the | ||||
* hardware that this frame is available to transmit. | * hardware that this frame is available to transmit. | ||||
*/ | */ | ||||
++txr->total_packets; | ++txr->total_packets; | ||||
wr32(hw, txr->tail, i); | wr32(hw, txr->tail, i); | ||||
ixl_flush(hw); | |||||
/* Mark outstanding work */ | /* Mark outstanding work */ | ||||
if (que->busy == 0) | if (que->busy == 0) | ||||
que->busy = 1; | que->busy = 1; | ||||
return (0); | return (0); | ||||
xmit_fail: | xmit_fail: | ||||
bus_dmamap_unload(tag, buf->map); | bus_dmamap_unload(tag, buf->map); | ||||
return (error); | return (error); | ||||
▲ Show 20 Lines • Show All 1,427 Lines • Show Last 20 Lines |