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head/sys/dev/ixl/i40e_adminq_cmd.h
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/* This header file defines the i40e Admin Queue commands and is shared between | /* This header file defines the i40e Admin Queue commands and is shared between | ||||
* i40e Firmware and Software. | * i40e Firmware and Software. | ||||
* | * | ||||
* This file needs to comply with the Linux Kernel coding style. | * This file needs to comply with the Linux Kernel coding style. | ||||
*/ | */ | ||||
#define I40E_FW_API_VERSION_MAJOR 0x0001 | #define I40E_FW_API_VERSION_MAJOR 0x0001 | ||||
#ifdef X722_SUPPORT | |||||
#define I40E_FW_API_VERSION_MINOR 0x0003 | |||||
#else | |||||
#define I40E_FW_API_VERSION_MINOR 0x0004 | #define I40E_FW_API_VERSION_MINOR 0x0004 | ||||
#endif | |||||
struct i40e_aq_desc { | struct i40e_aq_desc { | ||||
__le16 flags; | __le16 flags; | ||||
__le16 opcode; | __le16 opcode; | ||||
__le16 datalen; | __le16 datalen; | ||||
__le16 retval; | __le16 retval; | ||||
__le32 cookie_high; | __le32 cookie_high; | ||||
__le32 cookie_low; | __le32 cookie_low; | ||||
▲ Show 20 Lines • Show All 207 Lines • ▼ Show 20 Lines | enum i40e_admin_queue_opc { | ||||
i40e_aqc_opc_lldp_start = 0x0A06, | i40e_aqc_opc_lldp_start = 0x0A06, | ||||
i40e_aqc_opc_get_cee_dcb_cfg = 0x0A07, | i40e_aqc_opc_get_cee_dcb_cfg = 0x0A07, | ||||
i40e_aqc_opc_lldp_set_local_mib = 0x0A08, | i40e_aqc_opc_lldp_set_local_mib = 0x0A08, | ||||
i40e_aqc_opc_lldp_stop_start_spec_agent = 0x0A09, | i40e_aqc_opc_lldp_stop_start_spec_agent = 0x0A09, | ||||
/* Tunnel commands */ | /* Tunnel commands */ | ||||
i40e_aqc_opc_add_udp_tunnel = 0x0B00, | i40e_aqc_opc_add_udp_tunnel = 0x0B00, | ||||
i40e_aqc_opc_del_udp_tunnel = 0x0B01, | i40e_aqc_opc_del_udp_tunnel = 0x0B01, | ||||
#ifdef X722_SUPPORT | |||||
i40e_aqc_opc_set_rss_key = 0x0B02, | |||||
i40e_aqc_opc_set_rss_lut = 0x0B03, | |||||
i40e_aqc_opc_get_rss_key = 0x0B04, | |||||
i40e_aqc_opc_get_rss_lut = 0x0B05, | |||||
#endif | |||||
/* Async Events */ | /* Async Events */ | ||||
i40e_aqc_opc_event_lan_overflow = 0x1001, | i40e_aqc_opc_event_lan_overflow = 0x1001, | ||||
/* OEM commands */ | /* OEM commands */ | ||||
i40e_aqc_opc_oem_parameter_change = 0xFE00, | i40e_aqc_opc_oem_parameter_change = 0xFE00, | ||||
i40e_aqc_opc_oem_device_status_change = 0xFE01, | i40e_aqc_opc_oem_device_status_change = 0xFE01, | ||||
i40e_aqc_opc_oem_ocsd_initialize = 0xFE02, | i40e_aqc_opc_oem_ocsd_initialize = 0xFE02, | ||||
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#define I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT 0 | #define I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT 0 | ||||
#define I40E_AQ_VSI_TC_QUE_OFFSET_MASK (0x1FF << \ | #define I40E_AQ_VSI_TC_QUE_OFFSET_MASK (0x1FF << \ | ||||
I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) | I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) | ||||
#define I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT 9 | #define I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT 9 | ||||
#define I40E_AQ_VSI_TC_QUE_NUMBER_MASK (0x7 << \ | #define I40E_AQ_VSI_TC_QUE_NUMBER_MASK (0x7 << \ | ||||
I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT) | I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT) | ||||
/* queueing option section */ | /* queueing option section */ | ||||
u8 queueing_opt_flags; | u8 queueing_opt_flags; | ||||
#ifdef X722_SUPPORT | |||||
#define I40E_AQ_VSI_QUE_OPT_MULTICAST_UDP_ENA 0x04 | |||||
#define I40E_AQ_VSI_QUE_OPT_UNICAST_UDP_ENA 0x08 | |||||
#endif | |||||
#define I40E_AQ_VSI_QUE_OPT_TCP_ENA 0x10 | #define I40E_AQ_VSI_QUE_OPT_TCP_ENA 0x10 | ||||
#define I40E_AQ_VSI_QUE_OPT_FCOE_ENA 0x20 | #define I40E_AQ_VSI_QUE_OPT_FCOE_ENA 0x20 | ||||
#ifdef X722_SUPPORT | |||||
#define I40E_AQ_VSI_QUE_OPT_RSS_LUT_PF 0x00 | |||||
#define I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI 0x40 | |||||
#endif | |||||
u8 queueing_opt_reserved[3]; | u8 queueing_opt_reserved[3]; | ||||
/* scheduler section */ | /* scheduler section */ | ||||
u8 up_enable_bits; | u8 up_enable_bits; | ||||
u8 sched_reserved; | u8 sched_reserved; | ||||
/* outer up section */ | /* outer up section */ | ||||
__le32 outer_up_table; /* same structure and defines as ingress table */ | __le32 outer_up_table; /* same structure and defines as ingress table */ | ||||
u8 cmd_reserved[8]; | u8 cmd_reserved[8]; | ||||
/* last 32 bytes are written by FW */ | /* last 32 bytes are written by FW */ | ||||
▲ Show 20 Lines • Show All 1,289 Lines • ▼ Show 20 Lines | |||||
I40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_get_cee_dcb_cfg_resp); | I40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_get_cee_dcb_cfg_resp); | ||||
/* Set Local LLDP MIB (indirect 0x0A08) | /* Set Local LLDP MIB (indirect 0x0A08) | ||||
* Used to replace the local MIB of a given LLDP agent. e.g. DCBx | * Used to replace the local MIB of a given LLDP agent. e.g. DCBx | ||||
*/ | */ | ||||
struct i40e_aqc_lldp_set_local_mib { | struct i40e_aqc_lldp_set_local_mib { | ||||
#define SET_LOCAL_MIB_AC_TYPE_DCBX_SHIFT 0 | #define SET_LOCAL_MIB_AC_TYPE_DCBX_SHIFT 0 | ||||
#define SET_LOCAL_MIB_AC_TYPE_DCBX_MASK (1 << SET_LOCAL_MIB_AC_TYPE_DCBX_SHIFT) | #define SET_LOCAL_MIB_AC_TYPE_DCBX_MASK (1 << \ | ||||
SET_LOCAL_MIB_AC_TYPE_DCBX_SHIFT) | |||||
#define SET_LOCAL_MIB_AC_TYPE_LOCAL_MIB 0x0 | |||||
#define SET_LOCAL_MIB_AC_TYPE_NON_WILLING_APPS_SHIFT (1) | |||||
#define SET_LOCAL_MIB_AC_TYPE_NON_WILLING_APPS_MASK (1 << \ | |||||
SET_LOCAL_MIB_AC_TYPE_NON_WILLING_APPS_SHIFT) | |||||
#define SET_LOCAL_MIB_AC_TYPE_NON_WILLING_APPS 0x1 | |||||
u8 type; | u8 type; | ||||
u8 reserved0; | u8 reserved0; | ||||
__le16 length; | __le16 length; | ||||
u8 reserved1[4]; | u8 reserved1[4]; | ||||
__le32 address_high; | __le32 address_high; | ||||
__le32 address_low; | __le32 address_low; | ||||
}; | }; | ||||
▲ Show 20 Lines • Show All 49 Lines • ▼ Show 20 Lines | struct i40e_aqc_del_udp_tunnel_completion { | ||||
__le16 udp_port; | __le16 udp_port; | ||||
u8 index; /* 0 to 15 */ | u8 index; /* 0 to 15 */ | ||||
u8 multiple_pfs; | u8 multiple_pfs; | ||||
u8 total_filters_used; | u8 total_filters_used; | ||||
u8 reserved1[11]; | u8 reserved1[11]; | ||||
}; | }; | ||||
I40E_CHECK_CMD_LENGTH(i40e_aqc_del_udp_tunnel_completion); | I40E_CHECK_CMD_LENGTH(i40e_aqc_del_udp_tunnel_completion); | ||||
#ifdef X722_SUPPORT | |||||
struct i40e_aqc_get_set_rss_key { | |||||
#define I40E_AQC_SET_RSS_KEY_VSI_VALID (0x1 << 15) | |||||
#define I40E_AQC_SET_RSS_KEY_VSI_ID_SHIFT 0 | |||||
#define I40E_AQC_SET_RSS_KEY_VSI_ID_MASK (0x3FF << \ | |||||
I40E_AQC_SET_RSS_KEY_VSI_ID_SHIFT) | |||||
__le16 vsi_id; | |||||
u8 reserved[6]; | |||||
__le32 addr_high; | |||||
__le32 addr_low; | |||||
}; | |||||
I40E_CHECK_CMD_LENGTH(i40e_aqc_get_set_rss_key); | |||||
struct i40e_aqc_get_set_rss_key_data { | |||||
u8 standard_rss_key[0x28]; | |||||
u8 extended_hash_key[0xc]; | |||||
}; | |||||
I40E_CHECK_STRUCT_LEN(0x34, i40e_aqc_get_set_rss_key_data); | |||||
struct i40e_aqc_get_set_rss_lut { | |||||
#define I40E_AQC_SET_RSS_LUT_VSI_VALID (0x1 << 15) | |||||
#define I40E_AQC_SET_RSS_LUT_VSI_ID_SHIFT 0 | |||||
#define I40E_AQC_SET_RSS_LUT_VSI_ID_MASK (0x3FF << \ | |||||
I40E_AQC_SET_RSS_LUT_VSI_ID_SHIFT) | |||||
__le16 vsi_id; | |||||
#define I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT 0 | |||||
#define I40E_AQC_SET_RSS_LUT_TABLE_TYPE_MASK (0x1 << \ | |||||
I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT) | |||||
#define I40E_AQC_SET_RSS_LUT_TABLE_TYPE_VSI 0 | |||||
#define I40E_AQC_SET_RSS_LUT_TABLE_TYPE_PF 1 | |||||
__le16 flags; | |||||
u8 reserved[4]; | |||||
__le32 addr_high; | |||||
__le32 addr_low; | |||||
}; | |||||
I40E_CHECK_CMD_LENGTH(i40e_aqc_get_set_rss_lut); | |||||
#endif | |||||
/* tunnel key structure 0x0B10 */ | /* tunnel key structure 0x0B10 */ | ||||
struct i40e_aqc_tunnel_key_structure { | struct i40e_aqc_tunnel_key_structure { | ||||
u8 key1_off; | u8 key1_off; | ||||
u8 key2_off; | u8 key2_off; | ||||
u8 key1_len; /* 0 to 15 */ | u8 key1_len; /* 0 to 15 */ | ||||
u8 key2_len; /* 0 to 15 */ | u8 key2_len; /* 0 to 15 */ | ||||
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