Differential D44351 Diff 136020 sys/arm64/arm64/debug_monitor.c

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sys/arm64/arm64/debug_monitor.c

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	dbg_register_sync(struct debug_monitor_state *monitor)			dbg_register_sync(struct debug_monitor_state *monitor)
	{			{
	uint64_t mdscr;			uint64_t mdscr;
	int i;			int i;

	if (monitor == NULL)			if (monitor == NULL)
	monitor = &kernel_monitor;			monitor = &kernel_monitor;

	mdscr = READ_SPECIALREG(mdscr_el1);
	if ((monitor->dbg_flags & DBGMON_ENABLED) == 0) {
	mdscr &= ~(MDSCR_MDE \| MDSCR_KDE);
	} else {
	for (i = 0; i < dbg_breakpoint_num; i++) {			for (i = 0; i < dbg_breakpoint_num; i++) {
	dbg_wb_write_reg(DBG_REG_BASE_BCR, i,			dbg_wb_write_reg(DBG_REG_BASE_BCR, i,
	monitor->dbg_bcr[i]);			monitor->dbg_bcr[i]);
	dbg_wb_write_reg(DBG_REG_BASE_BVR, i,			dbg_wb_write_reg(DBG_REG_BASE_BVR, i,
	monitor->dbg_bvr[i]);			monitor->dbg_bvr[i]);
	}			}

	for (i = 0; i < dbg_watchpoint_num; i++) {			for (i = 0; i < dbg_watchpoint_num; i++) {
	dbg_wb_write_reg(DBG_REG_BASE_WCR, i,			dbg_wb_write_reg(DBG_REG_BASE_WCR, i,
	monitor->dbg_wcr[i]);			monitor->dbg_wcr[i]);
	dbg_wb_write_reg(DBG_REG_BASE_WVR, i,			dbg_wb_write_reg(DBG_REG_BASE_WVR, i,
	monitor->dbg_wvr[i]);			monitor->dbg_wvr[i]);
	}			}

				mdscr = READ_SPECIALREG(mdscr_el1);
				if ((monitor->dbg_flags & DBGMON_ENABLED) == 0) {
				mdscr &= ~(MDSCR_MDE \| MDSCR_KDE);
				} else {
	mdscr \|= MDSCR_MDE;			mdscr \|= MDSCR_MDE;
	if ((monitor->dbg_flags & DBGMON_KERNEL) == DBGMON_KERNEL)			if ((monitor->dbg_flags & DBGMON_KERNEL) == DBGMON_KERNEL)
	mdscr \|= MDSCR_KDE;			mdscr \|= MDSCR_KDE;
	}			}
	WRITE_SPECIALREG(mdscr_el1, mdscr);			WRITE_SPECIALREG(mdscr_el1, mdscr);
	isb();			isb();
	}			}

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