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sys/arm64/cavium/thunder_pcie_pem.c
Show First 20 Lines • Show All 116 Lines • ▼ Show 20 Lines | |||||
#define PCI_IO_SIZE 0x00100000UL | #define PCI_IO_SIZE 0x00100000UL | ||||
#define PCI_MEMORY_BASE PCI_IO_SIZE | #define PCI_MEMORY_BASE PCI_IO_SIZE | ||||
#define PCI_MEMORY_SIZE 0xFFF00000UL | #define PCI_MEMORY_SIZE 0xFFF00000UL | ||||
#define RID_PEM_SPACE 1 | #define RID_PEM_SPACE 1 | ||||
static int thunder_pem_activate_resource(device_t, device_t, int, int, | static int thunder_pem_activate_resource(device_t, device_t, int, int, | ||||
struct resource *); | struct resource *); | ||||
static int thunder_pem_adjust_resource(device_t, device_t, int, | static int thunder_pem_adjust_resource(device_t, device_t, | ||||
struct resource *, rman_res_t, rman_res_t); | struct resource *, rman_res_t, rman_res_t); | ||||
static struct resource * thunder_pem_alloc_resource(device_t, device_t, int, | static struct resource * thunder_pem_alloc_resource(device_t, device_t, int, | ||||
int *, rman_res_t, rman_res_t, rman_res_t, u_int); | int *, rman_res_t, rman_res_t, rman_res_t, u_int); | ||||
static int thunder_pem_alloc_msi(device_t, device_t, int, int, int *); | static int thunder_pem_alloc_msi(device_t, device_t, int, int, int *); | ||||
static int thunder_pem_release_msi(device_t, device_t, int, int *); | static int thunder_pem_release_msi(device_t, device_t, int, int *); | ||||
static int thunder_pem_alloc_msix(device_t, device_t, int *); | static int thunder_pem_alloc_msix(device_t, device_t, int *); | ||||
static int thunder_pem_release_msix(device_t, device_t, int); | static int thunder_pem_release_msix(device_t, device_t, int); | ||||
static int thunder_pem_map_msi(device_t, device_t, int, uint64_t *, uint32_t *); | static int thunder_pem_map_msi(device_t, device_t, int, uint64_t *, uint32_t *); | ||||
▲ Show 20 Lines • Show All 216 Lines • ▼ Show 20 Lines | case SYS_RES_IOPORT: | ||||
bus_space_unmap(map->r_bustag, map->r_bushandle, map->r_size); | bus_space_unmap(map->r_bustag, map->r_bushandle, map->r_size); | ||||
return (0); | return (0); | ||||
default: | default: | ||||
return (EINVAL); | return (EINVAL); | ||||
} | } | ||||
} | } | ||||
static int | static int | ||||
thunder_pem_adjust_resource(device_t dev, device_t child, int type, | thunder_pem_adjust_resource(device_t dev, device_t child, struct resource *res, | ||||
struct resource *res, rman_res_t start, rman_res_t end) | rman_res_t start, rman_res_t end) | ||||
{ | { | ||||
#if defined(NEW_PCIB) && defined(PCI_RES_BUS) | #if defined(NEW_PCIB) && defined(PCI_RES_BUS) | ||||
struct thunder_pem_softc *sc; | struct thunder_pem_softc *sc; | ||||
sc = device_get_softc(dev); | sc = device_get_softc(dev); | ||||
#endif | #endif | ||||
switch (type) { | switch (rman_get_type(res)) { | ||||
#if defined(NEW_PCIB) && defined(PCI_RES_BUS) | #if defined(NEW_PCIB) && defined(PCI_RES_BUS) | ||||
case PCI_RES_BUS: | case PCI_RES_BUS: | ||||
return (pci_domain_adjust_bus(sc->id, child, res, start, end)); | return (pci_domain_adjust_bus(sc->id, child, res, start, end)); | ||||
#endif | #endif | ||||
case SYS_RES_MEMORY: | case SYS_RES_MEMORY: | ||||
case SYS_RES_IOPORT: | case SYS_RES_IOPORT: | ||||
return (bus_generic_rman_adjust_resource(dev, child, type, res, | return (bus_generic_rman_adjust_resource(dev, child, res, start, | ||||
start, end)); | end)); | ||||
default: | default: | ||||
return (bus_generic_adjust_resource(dev, child, type, res, | return (bus_generic_adjust_resource(dev, child, res, start, | ||||
start, end)); | end)); | ||||
} | } | ||||
} | } | ||||
static bus_dma_tag_t | static bus_dma_tag_t | ||||
thunder_pem_get_dma_tag(device_t dev, device_t child) | thunder_pem_get_dma_tag(device_t dev, device_t child) | ||||
{ | { | ||||
struct thunder_pem_softc *sc; | struct thunder_pem_softc *sc; | ||||
▲ Show 20 Lines • Show All 587 Lines • Show Last 20 Lines |