Differential D5859 Diff 15139 head/sys/arm64/arm64/pmap.c

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head/sys/arm64/arm64/pmap.c

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vm_offset_t kernel_vm_end = 0;		vm_offset_t kernel_vm_end = 0;

struct msgbuf *msgbufp = NULL;		struct msgbuf *msgbufp = NULL;

static struct rwlock_padalign pvh_global_lock;		static struct rwlock_padalign pvh_global_lock;

vm_paddr_t dmap_phys_base; /* The start of the dmap region */		vm_paddr_t dmap_phys_base; /* The start of the dmap region */

		/* This code assumes all L1 DMAP entries will be used */
		CTASSERT((DMAP_MIN_ADDRESS & ~L0_OFFSET) == DMAP_MIN_ADDRESS);
		CTASSERT((DMAP_MAX_ADDRESS & ~L0_OFFSET) == DMAP_MAX_ADDRESS);

		#define DMAP_TABLES ((DMAP_MAX_ADDRESS - DMAP_MIN_ADDRESS) >> L0_SHIFT)
		extern pt_entry_t pagetable_dmap[];

/*		/*
* Data for the pv entry allocation mechanism		* Data for the pv entry allocation mechanism
*/		*/
static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);		static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
static struct mtx pv_chunks_mutex;		static struct mtx pv_chunks_mutex;
static struct rwlock pv_list_locks[NPV_LIST_LOCKS];		static struct rwlock pv_list_locks[NPV_LIST_LOCKS];

static void free_pv_chunk(struct pv_chunk *pc);		static void free_pv_chunk(struct pv_chunk *pc);
▲ Show 20 Lines • Show All 305 Lines • ▼ Show 20 Lines	pmap_early_vtophys(vm_offset_t l1pt, vm_offset_t va)
pt_entry_t *l2;		pt_entry_t *l2;

l2 = pmap_early_page_idx(l1pt, va, &l1_slot, &l2_slot);		l2 = pmap_early_page_idx(l1pt, va, &l1_slot, &l2_slot);

return ((l2[l2_slot] & ~ATTR_MASK) + (va & L2_OFFSET));		return ((l2[l2_slot] & ~ATTR_MASK) + (va & L2_OFFSET));
}		}

static void		static void
pmap_bootstrap_dmap(vm_offset_t l1pt, vm_paddr_t kernstart)		pmap_bootstrap_dmap(vm_offset_t kern_l1, vm_paddr_t kernstart)
{		{
vm_offset_t va;		vm_offset_t va;
vm_paddr_t pa;		vm_paddr_t pa;
pd_entry_t *l1;
u_int l1_slot;		u_int l1_slot;

pa = dmap_phys_base = kernstart & ~L1_OFFSET;		pa = dmap_phys_base = kernstart & ~L1_OFFSET;
va = DMAP_MIN_ADDRESS;		va = DMAP_MIN_ADDRESS;
l1 = (pd_entry_t *)l1pt;
l1_slot = pmap_l1_index(DMAP_MIN_ADDRESS);

for (; va < DMAP_MAX_ADDRESS;		for (; va < DMAP_MAX_ADDRESS;
pa += L1_SIZE, va += L1_SIZE, l1_slot++) {		pa += L1_SIZE, va += L1_SIZE, l1_slot++) {
KASSERT(l1_slot < Ln_ENTRIES, ("Invalid L1 index"));		l1_slot = ((va - DMAP_MIN_ADDRESS) >> L1_SHIFT);

pmap_load_store(&l1[l1_slot],		pmap_load_store(&pagetable_dmap[l1_slot],
(pa & ~L1_OFFSET) \| ATTR_DEFAULT \|		(pa & ~L1_OFFSET) \| ATTR_DEFAULT \|
ATTR_IDX(CACHED_MEMORY) \| L1_BLOCK);		ATTR_IDX(CACHED_MEMORY) \| L1_BLOCK);
}		}

cpu_dcache_wb_range((vm_offset_t)l1, PAGE_SIZE);		cpu_dcache_wb_range((vm_offset_t)pagetable_dmap,
		PAGE_SIZE * DMAP_TABLES);
cpu_tlb_flushID();		cpu_tlb_flushID();
}		}

static vm_offset_t		static vm_offset_t
pmap_bootstrap_l2(vm_offset_t l1pt, vm_offset_t va, vm_offset_t l2_start)		pmap_bootstrap_l2(vm_offset_t l1pt, vm_offset_t va, vm_offset_t l2_start)
{		{
vm_offset_t l2pt;		vm_offset_t l2pt;
vm_paddr_t pa;		vm_paddr_t pa;
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