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head/sys/arm/allwinner/a20/a20_if_dwc.c
| Show All 35 Lines | |||||
| #include <machine/bus.h> | #include <machine/bus.h> | ||||
| #include <dev/dwc/if_dwc.h> | #include <dev/dwc/if_dwc.h> | ||||
| #include <dev/dwc/if_dwcvar.h> | #include <dev/dwc/if_dwcvar.h> | ||||
| #include <dev/ofw/ofw_bus.h> | #include <dev/ofw/ofw_bus.h> | ||||
| #include <dev/ofw/ofw_bus_subr.h> | #include <dev/ofw/ofw_bus_subr.h> | ||||
| #include <arm/allwinner/allwinner_machdep.h> | #include <arm/allwinner/allwinner_machdep.h> | ||||
| #include <arm/allwinner/a10_clk.h> | #include <dev/extres/clk/clk.h> | ||||
| #include <arm/allwinner/a31/a31_clk.h> | |||||
| #include "if_dwc_if.h" | #include "if_dwc_if.h" | ||||
| static int | static int | ||||
| a20_if_dwc_probe(device_t dev) | a20_if_dwc_probe(device_t dev) | ||||
| { | { | ||||
| if (!ofw_bus_status_okay(dev)) | if (!ofw_bus_status_okay(dev)) | ||||
| return (ENXIO); | return (ENXIO); | ||||
| if (!ofw_bus_is_compatible(dev, "allwinner,sun7i-a20-gmac")) | if (!ofw_bus_is_compatible(dev, "allwinner,sun7i-a20-gmac")) | ||||
| return (ENXIO); | return (ENXIO); | ||||
| device_set_desc(dev, "A20 Gigabit Ethernet Controller"); | device_set_desc(dev, "A20 Gigabit Ethernet Controller"); | ||||
| return (BUS_PROBE_DEFAULT); | return (BUS_PROBE_DEFAULT); | ||||
| } | } | ||||
| static int | static int | ||||
| a20_if_dwc_init(device_t dev) | a20_if_dwc_init(device_t dev) | ||||
| { | { | ||||
| int clk; | const char *tx_parent_name; | ||||
| char *phy_type; | |||||
| clk_t clk_tx, clk_tx_parent; | |||||
| phandle_t node; | |||||
| int error; | |||||
| /* Activate GMAC clock and set the pin mux to rgmii. */ | node = ofw_bus_get_node(dev); | ||||
| switch (allwinner_soc_type()) { | |||||
| #if defined(SOC_ALLWINNER_A10) || defined(SOC_ALLWINNER_A20) | /* Configure PHY for MII or RGMII mode */ | ||||
| case ALLWINNERSOC_A10: | if (OF_getprop_alloc(node, "phy-mode", 1, (void **)&phy_type)) { | ||||
| case ALLWINNERSOC_A10S: | error = clk_get_by_ofw_name(dev, "allwinner_gmac_tx", &clk_tx); | ||||
| case ALLWINNERSOC_A20: | if (error != 0) { | ||||
| clk = a10_clk_gmac_activate(ofw_bus_get_node(dev)); | device_printf(dev, "could not get tx clk\n"); | ||||
| break; | return (error); | ||||
| #endif | |||||
| #if defined(SOC_ALLWINNER_A31) || defined(SOC_ALLWINNER_A31S) | |||||
| case ALLWINNERSOC_A31: | |||||
| case ALLWINNERSOC_A31S: | |||||
| clk = a31_clk_gmac_activate(ofw_bus_get_node(dev)); | |||||
| break; | |||||
| #endif | |||||
| default: | |||||
| clk = -1; | |||||
| } | } | ||||
| if (clk != 0) { | |||||
| device_printf(dev, "could not activate gmac module\n"); | if (strcmp(phy_type, "rgmii") == 0) | ||||
| return (ENXIO); | tx_parent_name = "gmac_int_tx"; | ||||
| else | |||||
| tx_parent_name = "mii_phy_tx"; | |||||
| error = clk_get_by_name(dev, tx_parent_name, &clk_tx_parent); | |||||
| if (error != 0) { | |||||
| device_printf(dev, "could not get clock '%s'\n", | |||||
| tx_parent_name); | |||||
| return (error); | |||||
| } | |||||
| error = clk_set_parent_by_clk(clk_tx, clk_tx_parent); | |||||
| if (error != 0) { | |||||
| device_printf(dev, "could not set tx clk parent\n"); | |||||
| return (error); | |||||
| } | |||||
| } | } | ||||
| return (0); | return (0); | ||||
| } | } | ||||
| static int | static int | ||||
| a20_if_dwc_mac_type(device_t dev) | a20_if_dwc_mac_type(device_t dev) | ||||
| { | { | ||||
| Show All 30 Lines | |||||