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sys/arm/nvidia/tegra_lic.c
Show First 20 Lines • Show All 82 Lines • ▼ Show 20 Lines | |||||
struct tegra_lic_sc { | struct tegra_lic_sc { | ||||
device_t dev; | device_t dev; | ||||
struct resource *mem_res[nitems(lic_spec)]; | struct resource *mem_res[nitems(lic_spec)]; | ||||
device_t parent; | device_t parent; | ||||
}; | }; | ||||
static int | static int | ||||
tegra_lic_register(device_t dev, struct intr_irqsrc *isrc, boolean_t *is_percpu) | tegra_lic_alloc_intr(device_t dev, struct intr_irqsrc *isrc, | ||||
struct resource *res, struct intr_map_data *data) | |||||
{ | { | ||||
struct tegra_lic_sc *sc = device_get_softc(dev); | struct tegra_lic_sc *sc = device_get_softc(dev); | ||||
return (PIC_REGISTER(sc->parent, isrc, is_percpu)); | return (PIC_ALLOC_INTR(sc->parent, isrc, res, data)); | ||||
} | } | ||||
static int | static void | ||||
tegra_lic_unregister(device_t dev, struct intr_irqsrc *isrc) | tegra_lic_disable_intr(device_t dev, struct intr_irqsrc *isrc) | ||||
{ | { | ||||
struct tegra_lic_sc *sc = device_get_softc(dev); | struct tegra_lic_sc *sc = device_get_softc(dev); | ||||
return (PIC_UNREGISTER(sc->parent, isrc)); | PIC_DISABLE_INTR(sc->parent, isrc); | ||||
} | } | ||||
static void | static void | ||||
tegra_lic_enable_source(device_t dev, struct intr_irqsrc *isrc) | tegra_lic_enable_intr(device_t dev, struct intr_irqsrc *isrc) | ||||
{ | { | ||||
struct tegra_lic_sc *sc = device_get_softc(dev); | struct tegra_lic_sc *sc = device_get_softc(dev); | ||||
PIC_ENABLE_SOURCE(sc->parent, isrc); | PIC_ENABLE_INTR(sc->parent, isrc); | ||||
} | } | ||||
static void | static int | ||||
tegra_lic_disable_source(device_t dev, struct intr_irqsrc *isrc) | tegra_lic_map_intr(device_t dev, struct intr_map_data *data, | ||||
struct intr_irqsrc **isrcp) | |||||
{ | { | ||||
struct tegra_lic_sc *sc = device_get_softc(dev); | struct tegra_lic_sc *sc = device_get_softc(dev); | ||||
PIC_DISABLE_SOURCE(sc->parent, isrc); | return (PIC_MAP_INTR(sc->parent, data, isrcp)); | ||||
} | } | ||||
static void | static int | ||||
tegra_lic_enable_intr(device_t dev, struct intr_irqsrc *isrc) | tegra_lic_release_intr(device_t dev, struct intr_irqsrc *isrc, | ||||
struct resource *res, struct intr_map_data *data) | |||||
{ | { | ||||
struct tegra_lic_sc *sc = device_get_softc(dev); | struct tegra_lic_sc *sc = device_get_softc(dev); | ||||
PIC_ENABLE_INTR(sc->parent, isrc); | return (PIC_RELEASE_INTR(sc->parent, isrc, res, data)); | ||||
} | } | ||||
static int | |||||
tegra_lic_setup_intr(device_t dev, struct intr_irqsrc *isrc, | |||||
struct resource *res, struct intr_map_data *data) | |||||
{ | |||||
struct tegra_lic_sc *sc = device_get_softc(dev); | |||||
return (PIC_SETUP_INTR(sc->parent, isrc, res, data)); | |||||
} | |||||
static int | |||||
tegra_lic_teardown_intr(device_t dev, struct intr_irqsrc *isrc, | |||||
struct resource *res, struct intr_map_data *data) | |||||
{ | |||||
struct tegra_lic_sc *sc = device_get_softc(dev); | |||||
return (PIC_TEARDOWN_INTR(sc->parent, isrc, res, data)); | |||||
} | |||||
static void | static void | ||||
tegra_lic_pre_ithread(device_t dev, struct intr_irqsrc *isrc) | tegra_lic_pre_ithread(device_t dev, struct intr_irqsrc *isrc) | ||||
{ | { | ||||
struct tegra_lic_sc *sc = device_get_softc(dev); | struct tegra_lic_sc *sc = device_get_softc(dev); | ||||
PIC_PRE_ITHREAD(sc->parent, isrc); | PIC_PRE_ITHREAD(sc->parent, isrc); | ||||
} | } | ||||
Show All 11 Lines | |||||
{ | { | ||||
struct tegra_lic_sc *sc = device_get_softc(dev); | struct tegra_lic_sc *sc = device_get_softc(dev); | ||||
PIC_POST_FILTER(sc->parent, isrc); | PIC_POST_FILTER(sc->parent, isrc); | ||||
} | } | ||||
#ifdef SMP | #ifdef SMP | ||||
static int | static int | ||||
tegra_lic_bind(device_t dev, struct intr_irqsrc *isrc) | tegra_lic_bind_intr(device_t dev, struct intr_irqsrc *isrc) | ||||
{ | { | ||||
struct tegra_lic_sc *sc = device_get_softc(dev); | struct tegra_lic_sc *sc = device_get_softc(dev); | ||||
return (PIC_BIND(sc->parent, isrc)); | return (PIC_BIND_INTR(sc->parent, isrc)); | ||||
} | } | ||||
#endif | #endif | ||||
static int | static int | ||||
tegra_lic_probe(device_t dev) | tegra_lic_probe(device_t dev) | ||||
{ | { | ||||
if (!ofw_bus_status_okay(dev)) | if (!ofw_bus_status_okay(dev)) | ||||
return (ENXIO); | return (ENXIO); | ||||
▲ Show 20 Lines • Show All 70 Lines • ▼ Show 20 Lines | |||||
} | } | ||||
static device_method_t tegra_lic_methods[] = { | static device_method_t tegra_lic_methods[] = { | ||||
DEVMETHOD(device_probe, tegra_lic_probe), | DEVMETHOD(device_probe, tegra_lic_probe), | ||||
DEVMETHOD(device_attach, tegra_lic_attach), | DEVMETHOD(device_attach, tegra_lic_attach), | ||||
DEVMETHOD(device_detach, tegra_lic_detach), | DEVMETHOD(device_detach, tegra_lic_detach), | ||||
/* Interrupt controller interface */ | /* Interrupt controller interface */ | ||||
DEVMETHOD(pic_register, tegra_lic_register), | DEVMETHOD(pic_alloc_intr, tegra_lic_alloc_intr), | ||||
DEVMETHOD(pic_unregister, tegra_lic_unregister), | DEVMETHOD(pic_disable_intr, tegra_lic_disable_intr), | ||||
DEVMETHOD(pic_enable_source, tegra_lic_enable_source), | |||||
DEVMETHOD(pic_disable_source, tegra_lic_disable_source), | |||||
DEVMETHOD(pic_enable_intr, tegra_lic_enable_intr), | DEVMETHOD(pic_enable_intr, tegra_lic_enable_intr), | ||||
DEVMETHOD(pic_map_intr, tegra_lic_map_intr), | |||||
DEVMETHOD(pic_release_intr, tegra_lic_release_intr), | |||||
DEVMETHOD(pic_setup_intr, tegra_lic_setup_intr), | |||||
DEVMETHOD(pic_teardown_intr, tegra_lic_teardown_intr), | |||||
DEVMETHOD(pic_pre_ithread, tegra_lic_pre_ithread), | DEVMETHOD(pic_pre_ithread, tegra_lic_pre_ithread), | ||||
DEVMETHOD(pic_post_ithread, tegra_lic_post_ithread), | DEVMETHOD(pic_post_ithread, tegra_lic_post_ithread), | ||||
DEVMETHOD(pic_post_filter, tegra_lic_post_filter), | DEVMETHOD(pic_post_filter, tegra_lic_post_filter), | ||||
#ifdef SMP | #ifdef SMP | ||||
DEVMETHOD(pic_bind, tegra_lic_bind), | DEVMETHOD(pic_bind_intr, tegra_lic_bind_intr), | ||||
#endif | #endif | ||||
DEVMETHOD_END | DEVMETHOD_END | ||||
}; | }; | ||||
devclass_t tegra_lic_devclass; | devclass_t tegra_lic_devclass; | ||||
DEFINE_CLASS_0(tegra_lic, tegra_lic_driver, tegra_lic_methods, | DEFINE_CLASS_0(tegra_lic, tegra_lic_driver, tegra_lic_methods, | ||||
sizeof(struct tegra_lic_sc)); | sizeof(struct tegra_lic_sc)); | ||||
EARLY_DRIVER_MODULE(tegra_lic, simplebus, tegra_lic_driver, tegra_lic_devclass, | EARLY_DRIVER_MODULE(tegra_lic, simplebus, tegra_lic_driver, tegra_lic_devclass, | ||||
NULL, NULL, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE + 1); | NULL, NULL, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE + 1); |