Differential D5696 Diff 14496 head/sys/dev/hyperv/vmbus/hv_hv.c

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head/sys/dev/hyperv/vmbus/hv_hv.c

Show First 20 Lines • Show All 362 Lines • ▼ Show 20 Lines	hv_vmbus_synic_init(void *arg)
shared_sint.as_uint64_t = 0;		shared_sint.as_uint64_t = 0;
shared_sint.u.vector = setup_args->vector;		shared_sint.u.vector = setup_args->vector;
shared_sint.u.masked = FALSE;		shared_sint.u.masked = FALSE;
shared_sint.u.auto_eoi = TRUE;		shared_sint.u.auto_eoi = TRUE;

wrmsr(HV_X64_MSR_SINT0 + HV_VMBUS_MESSAGE_SINT,		wrmsr(HV_X64_MSR_SINT0 + HV_VMBUS_MESSAGE_SINT,
shared_sint.as_uint64_t);		shared_sint.as_uint64_t);

		wrmsr(HV_X64_MSR_SINT0 + HV_VMBUS_TIMER_SINT,
		shared_sint.as_uint64_t);

/* Enable the global synic bit */		/* Enable the global synic bit */
sctrl.as_uint64_t = rdmsr(HV_X64_MSR_SCONTROL);		sctrl.as_uint64_t = rdmsr(HV_X64_MSR_SCONTROL);
sctrl.u.enable = 1;		sctrl.u.enable = 1;

wrmsr(HV_X64_MSR_SCONTROL, sctrl.as_uint64_t);		wrmsr(HV_X64_MSR_SCONTROL, sctrl.as_uint64_t);

hv_vmbus_g_context.syn_ic_initialized = TRUE;		hv_vmbus_g_context.syn_ic_initialized = TRUE;

Show All 20 Lines	if (!hv_vmbus_g_context.syn_ic_initialized)
return;		return;

shared_sint.as_uint64_t = rdmsr(		shared_sint.as_uint64_t = rdmsr(
HV_X64_MSR_SINT0 + HV_VMBUS_MESSAGE_SINT);		HV_X64_MSR_SINT0 + HV_VMBUS_MESSAGE_SINT);

shared_sint.u.masked = 1;		shared_sint.u.masked = 1;

/*		/*
* Disable the interrupt		* Disable the interrupt 0
*/		*/
wrmsr(		wrmsr(
HV_X64_MSR_SINT0 + HV_VMBUS_MESSAGE_SINT,		HV_X64_MSR_SINT0 + HV_VMBUS_MESSAGE_SINT,
shared_sint.as_uint64_t);		shared_sint.as_uint64_t);

		shared_sint.as_uint64_t = rdmsr(
		HV_X64_MSR_SINT0 + HV_VMBUS_TIMER_SINT);

		shared_sint.u.masked = 1;

		/*
		* Disable the interrupt 1
		*/
		wrmsr(
		HV_X64_MSR_SINT0 + HV_VMBUS_TIMER_SINT,
		shared_sint.as_uint64_t);
simp.as_uint64_t = rdmsr(HV_X64_MSR_SIMP);		simp.as_uint64_t = rdmsr(HV_X64_MSR_SIMP);
simp.u.simp_enabled = 0;		simp.u.simp_enabled = 0;
simp.u.base_simp_gpa = 0;		simp.u.base_simp_gpa = 0;

wrmsr(HV_X64_MSR_SIMP, simp.as_uint64_t);		wrmsr(HV_X64_MSR_SIMP, simp.as_uint64_t);

siefp.as_uint64_t = rdmsr(HV_X64_MSR_SIEFP);		siefp.as_uint64_t = rdmsr(HV_X64_MSR_SIEFP);
siefp.u.siefp_enabled = 0;		siefp.u.siefp_enabled = 0;
siefp.u.base_siefp_gpa = 0;		siefp.u.base_siefp_gpa = 0;

wrmsr(HV_X64_MSR_SIEFP, siefp.as_uint64_t);		wrmsr(HV_X64_MSR_SIEFP, siefp.as_uint64_t);
}		}