Changeset View
Changeset View
Standalone View
Standalone View
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_comp.h
Show First 20 Lines • Show All 55 Lines • ▼ Show 20 Lines | |||||
* | Bit | 15 - 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | | * | Bit | 15 - 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | | ||||
* + ===== + ------ + ----- + --- + ----- + ----- + ----- + -- + ---- + --- + | * + ===== + ------ + ----- + --- + ----- + ----- + ----- + -- + ---- + --- + | ||||
* | Flags | Rsvd | Dis. |Resvd| Dis. | Enh. |Auto |Sess| Rsvd | Rsvd| | * | Flags | Rsvd | Dis. |Resvd| Dis. | Enh. |Auto |Sess| Rsvd | Rsvd| | ||||
* | | Bits | secure | =0 | Type0 | ASB |Select |Type| = 0 | = 0 | | * | | Bits | secure | =0 | Type0 | ASB |Select |Type| = 0 | = 0 | | ||||
* | | = 0 |RAM use | | Header | |Best | | | | | * | | = 0 |RAM use | | Header | |Best | | | | | ||||
* | | |as intmd| | | | | | | | | * | | |as intmd| | | | | | | | | ||||
* | | | buf | | | | | | | | | * | | | buf | | | | | | | | | ||||
* + ===== + ------ + ----- + --- + ------ + ----- + ----- + -- + ---- + --- + | * + ===== + ------ + ----- + --- + ------ + ----- + ----- + -- + ---- + --- + | ||||
* Note: For QAT 2.0 Disable Secure Ram, DisType0 Header and Enhanced ASB bits | |||||
* are don't care. i.e., these features are removed from QAT 2.0. | |||||
*/ | */ | ||||
/** Flag usage */ | /** Flag usage */ | ||||
#define ICP_QAT_FW_COMP_STATELESS_SESSION 0 | #define ICP_QAT_FW_COMP_STATELESS_SESSION 0 | ||||
/**< @ingroup icp_qat_fw_comp | /**< @ingroup icp_qat_fw_comp | ||||
* Flag representing that session is stateless */ | * Flag representing that session is stateless */ | ||||
▲ Show 20 Lines • Show All 107 Lines • ▼ Show 20 Lines | #define ICP_QAT_FW_COMP_FLAGS_BUILD( \ | ||||
((enhanced_asb & ICP_QAT_FW_COMP_ENHANCED_AUTO_SELECT_BEST_MASK) \ | ((enhanced_asb & ICP_QAT_FW_COMP_ENHANCED_AUTO_SELECT_BEST_MASK) \ | ||||
<< ICP_QAT_FW_COMP_ENHANCED_AUTO_SELECT_BEST_BITPOS) | \ | << ICP_QAT_FW_COMP_ENHANCED_AUTO_SELECT_BEST_BITPOS) | \ | ||||
((ret_uncomp & ICP_QAT_FW_COMP_RET_DISABLE_TYPE0_HEADER_DATA_MASK) \ | ((ret_uncomp & ICP_QAT_FW_COMP_RET_DISABLE_TYPE0_HEADER_DATA_MASK) \ | ||||
<< ICP_QAT_FW_COMP_RET_DISABLE_TYPE0_HEADER_DATA_BITPOS) | \ | << ICP_QAT_FW_COMP_RET_DISABLE_TYPE0_HEADER_DATA_BITPOS) | \ | ||||
((secure_ram & ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_AS_INTMD_BUF_MASK) \ | ((secure_ram & ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_AS_INTMD_BUF_MASK) \ | ||||
<< ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_AS_INTMD_BUF_BITPOS)) | << ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_AS_INTMD_BUF_BITPOS)) | ||||
/** | /** | ||||
****************************************************************************** | ****************************************************************************** | ||||
* @ingroup icp_qat_fw_comp | * @ingroup icp_qat_fw_comp | ||||
* | * | ||||
* @description | * @description | ||||
* Macro used for the generation of the command flags for Compression Request. | |||||
* This should always be used for the generation of the flags. No direct sets or | |||||
* masks should be performed on the flags data | |||||
* | |||||
* @param sesstype Session Type | |||||
* @param autoselect AutoSelectBest | |||||
* Selects between compressed and uncompressed output. | |||||
* No distinction made between static and dynamic | |||||
* compressed data. | |||||
* | |||||
*********************************************************************************/ | |||||
#define ICP_QAT_FW_COMP_20_FLAGS_BUILD(sesstype, autoselect) \ | |||||
(((sesstype & ICP_QAT_FW_COMP_SESSION_TYPE_MASK) \ | |||||
<< ICP_QAT_FW_COMP_SESSION_TYPE_BITPOS) | \ | |||||
((autoselect & ICP_QAT_FW_COMP_AUTO_SELECT_BEST_MASK) \ | |||||
<< ICP_QAT_FW_COMP_AUTO_SELECT_BEST_BITPOS)) | |||||
/** | |||||
****************************************************************************** | |||||
* @ingroup icp_qat_fw_comp | |||||
* | |||||
* @description | |||||
* Macro for extraction of the session type bit | * Macro for extraction of the session type bit | ||||
* | * | ||||
* @param flags Flags to extract the session type bit from | * @param flags Flags to extract the session type bit from | ||||
* | * | ||||
******************************************************************************/ | ******************************************************************************/ | ||||
#define ICP_QAT_FW_COMP_SESSION_TYPE_GET(flags) \ | #define ICP_QAT_FW_COMP_SESSION_TYPE_GET(flags) \ | ||||
QAT_FIELD_GET(flags, \ | QAT_FIELD_GET(flags, \ | ||||
ICP_QAT_FW_COMP_SESSION_TYPE_BITPOS, \ | ICP_QAT_FW_COMP_SESSION_TYPE_BITPOS, \ | ||||
▲ Show 20 Lines • Show All 171 Lines • ▼ Show 20 Lines | |||||
* * ICP_QAT_FW_COMP_CNV | * * ICP_QAT_FW_COMP_CNV | ||||
* @param cnvnr Whether internal CNV recovery is to be performed | * @param cnvnr Whether internal CNV recovery is to be performed | ||||
* * ICP_QAT_FW_COMP_NO_CNV_RECOVERY | * * ICP_QAT_FW_COMP_NO_CNV_RECOVERY | ||||
* * ICP_QAT_FW_COMP_CNV_RECOVERY | * * ICP_QAT_FW_COMP_CNV_RECOVERY | ||||
* @param crc CRC Mode Flag - 0 legacy, 1 crc data struct | * @param crc CRC Mode Flag - 0 legacy, 1 crc data struct | ||||
* | * | ||||
*****************************************************************************/ | *****************************************************************************/ | ||||
#define ICP_QAT_FW_COMP_REQ_PARAM_FLAGS_BUILD( \ | #define ICP_QAT_FW_COMP_REQ_PARAM_FLAGS_BUILD( \ | ||||
sop, eop, bfinal, cnv, cnvnr, crc) \ | sop, eop, bfinal, cnv, cnvnr, cnvdfx, crc) \ | ||||
(((sop & ICP_QAT_FW_COMP_SOP_MASK) << ICP_QAT_FW_COMP_SOP_BITPOS) | \ | (((sop & ICP_QAT_FW_COMP_SOP_MASK) << ICP_QAT_FW_COMP_SOP_BITPOS) | \ | ||||
((eop & ICP_QAT_FW_COMP_EOP_MASK) << ICP_QAT_FW_COMP_EOP_BITPOS) | \ | ((eop & ICP_QAT_FW_COMP_EOP_MASK) << ICP_QAT_FW_COMP_EOP_BITPOS) | \ | ||||
((bfinal & ICP_QAT_FW_COMP_BFINAL_MASK) \ | ((bfinal & ICP_QAT_FW_COMP_BFINAL_MASK) \ | ||||
<< ICP_QAT_FW_COMP_BFINAL_BITPOS) | \ | << ICP_QAT_FW_COMP_BFINAL_BITPOS) | \ | ||||
((cnv & ICP_QAT_FW_COMP_CNV_MASK) << ICP_QAT_FW_COMP_CNV_BITPOS) | \ | ((cnv & ICP_QAT_FW_COMP_CNV_MASK) << ICP_QAT_FW_COMP_CNV_BITPOS) | \ | ||||
((cnvnr & ICP_QAT_FW_COMP_CNV_RECOVERY_MASK) \ | ((cnvnr & ICP_QAT_FW_COMP_CNVNR_MASK) \ | ||||
<< ICP_QAT_FW_COMP_CNV_RECOVERY_BITPOS) | \ | << ICP_QAT_FW_COMP_CNVNR_BITPOS) | \ | ||||
((cnvdfx & ICP_QAT_FW_COMP_CNV_DFX_MASK) \ | |||||
<< ICP_QAT_FW_COMP_CNV_DFX_BITPOS) | \ | |||||
((crc & ICP_QAT_FW_COMP_CRC_MODE_MASK) \ | ((crc & ICP_QAT_FW_COMP_CRC_MODE_MASK) \ | ||||
<< ICP_QAT_FW_COMP_CRC_MODE_BITPOS)) | << ICP_QAT_FW_COMP_CRC_MODE_BITPOS)) | ||||
/* | /* | ||||
* REQUEST FLAGS IN REQUEST PARAMETERS COMPRESSION | * REQUEST FLAGS IN REQUEST PARAMETERS COMPRESSION | ||||
* | * | ||||
* + ===== + ----- + --- +-----+-------+ --- + ---------+ --- + ---- + --- + | * + ===== + ----- + --- +-----+-------+ --- + ---------+ --- + ---- + --- + | ||||
* --- + | * --- + | ||||
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines | |||||
#define ICP_QAT_FW_COMP_NO_CNV_RECOVERY 0 | #define ICP_QAT_FW_COMP_NO_CNV_RECOVERY 0 | ||||
/**< @ingroup icp_qat_fw_comp | /**< @ingroup icp_qat_fw_comp | ||||
* Flag indicating that NO cnv recovery is to be performed on the request */ | * Flag indicating that NO cnv recovery is to be performed on the request */ | ||||
#define ICP_QAT_FW_COMP_CNV_RECOVERY 1 | #define ICP_QAT_FW_COMP_CNV_RECOVERY 1 | ||||
/**< @ingroup icp_qat_fw_comp | /**< @ingroup icp_qat_fw_comp | ||||
* Flag indicating that a cnv recovery is to be performed on the request */ | * Flag indicating that a cnv recovery is to be performed on the request */ | ||||
#define ICP_QAT_FW_COMP_NO_CNV_DFX 0 | |||||
/**< @ingroup icp_qat_fw_comp | |||||
* Flag indicating that NO CNV inject error is to be performed on the request */ | |||||
#define ICP_QAT_FW_COMP_CNV_DFX 1 | |||||
/**< @ingroup icp_qat_fw_comp | |||||
* Flag indicating that CNV inject error is to be performed on the request */ | |||||
#define ICP_QAT_FW_COMP_CRC_MODE_LEGACY 0 | #define ICP_QAT_FW_COMP_CRC_MODE_LEGACY 0 | ||||
/**< @ingroup icp_qat_fw_comp | /**< @ingroup icp_qat_fw_comp | ||||
* Flag representing to use the legacy CRC mode */ | * Flag representing to use the legacy CRC mode */ | ||||
#define ICP_QAT_FW_COMP_CRC_MODE_E2E 1 | #define ICP_QAT_FW_COMP_CRC_MODE_E2E 1 | ||||
/**< @ingroup icp_qat_fw_comp | /**< @ingroup icp_qat_fw_comp | ||||
* Flag representing to use the external CRC data struct */ | * Flag representing to use the external CRC data struct */ | ||||
Show All 32 Lines | |||||
#define ICP_QAT_FW_COMP_CNV_RECOVERY_MASK 0x1 | #define ICP_QAT_FW_COMP_CNV_RECOVERY_MASK 0x1 | ||||
/**< @ingroup icp_qat_fw_comp | /**< @ingroup icp_qat_fw_comp | ||||
* One bit mask for the CNV Recovery bit */ | * One bit mask for the CNV Recovery bit */ | ||||
#define ICP_QAT_FW_COMP_CNV_RECOVERY_BITPOS 17 | #define ICP_QAT_FW_COMP_CNV_RECOVERY_BITPOS 17 | ||||
/**< @ingroup icp_qat_fw_comp | /**< @ingroup icp_qat_fw_comp | ||||
* Starting bit position for the CNV Recovery bit */ | * Starting bit position for the CNV Recovery bit */ | ||||
#define ICP_QAT_FW_COMP_CNVNR_MASK 0x1 | |||||
/**< @ingroup icp_qat_fw_comp | |||||
* One bit mask for the CNV Recovery bit */ | |||||
#define ICP_QAT_FW_COMP_CNVNR_BITPOS 17 | |||||
/**< @ingroup icp_qat_fw_comp | |||||
* Starting bit position for the CNV Recovery bit */ | |||||
#define ICP_QAT_FW_COMP_CNV_DFX_BITPOS 18 | |||||
/**< @ingroup icp_qat_fw_comp | |||||
* Starting bit position for the CNV DFX bit */ | |||||
#define ICP_QAT_FW_COMP_CNV_DFX_MASK 0x1 | |||||
/**< @ingroup icp_qat_fw_comp | |||||
* One bit mask for the CNV DFX bit */ | |||||
#define ICP_QAT_FW_COMP_CRC_MODE_BITPOS 19 | #define ICP_QAT_FW_COMP_CRC_MODE_BITPOS 19 | ||||
/**< @ingroup icp_qat_fw_comp | /**< @ingroup icp_qat_fw_comp | ||||
* Starting bit position for CRC mode */ | * Starting bit position for CRC mode */ | ||||
#define ICP_QAT_FW_COMP_CRC_MODE_MASK 0x1 | #define ICP_QAT_FW_COMP_CRC_MODE_MASK 0x1 | ||||
/**< @ingroup icp_qat_fw_comp | /**< @ingroup icp_qat_fw_comp | ||||
* One bit mask used to determine CRC mode */ | * One bit mask used to determine CRC mode */ | ||||
#define ICP_QAT_FW_COMP_XXHASH_ACC_MODE_BITPOS 20 | |||||
/**< @ingroup icp_qat_fw_comp | |||||
* Starting bit position for xxHash accumulate mode */ | |||||
#define ICP_QAT_FW_COMP_XXHASH_ACC_MODE_MASK 0x1 | |||||
/**< @ingroup icp_qat_fw_comp | |||||
* One bit mask used to determine xxHash accumulate mode */ | |||||
/** | /** | ||||
****************************************************************************** | ****************************************************************************** | ||||
* @ingroup icp_qat_fw_comp | * @ingroup icp_qat_fw_comp | ||||
* | * | ||||
* @description | * @description | ||||
* Macro for extraction of the SOP bit | * Macro for extraction of the SOP bit | ||||
* | * | ||||
* @param flags Flags to extract the SOP bit from | * @param flags Flags to extract the SOP bit from | ||||
▲ Show 20 Lines • Show All 62 Lines • ▼ Show 20 Lines | |||||
#define ICP_QAT_FW_COMP_CRC_MODE_GET(flags) \ | #define ICP_QAT_FW_COMP_CRC_MODE_GET(flags) \ | ||||
QAT_FIELD_GET(flags, \ | QAT_FIELD_GET(flags, \ | ||||
ICP_QAT_FW_COMP_CRC_MODE_BITPOS, \ | ICP_QAT_FW_COMP_CRC_MODE_BITPOS, \ | ||||
ICP_QAT_FW_COMP_CRC_MODE_MASK) | ICP_QAT_FW_COMP_CRC_MODE_MASK) | ||||
/** | /** | ||||
****************************************************************************** | ****************************************************************************** | ||||
* @ingroup icp_qat_fw_comp | * @ingroup icp_qat_fw_comp | ||||
* | |||||
* @description | |||||
* Macro for extraction of the xxHash accumulate mode bit | |||||
* | |||||
* @param flags Flags to extract the xxHash accumulate mode bit from | |||||
* | |||||
*****************************************************************************/ | |||||
#define ICP_QAT_FW_COMP_XXHASH_ACC_MODE_GET(flags) \ | |||||
QAT_FIELD_GET(flags, \ | |||||
ICP_QAT_FW_COMP_XXHASH_ACC_MODE_BITPOS, \ | |||||
ICP_QAT_FW_COMP_XXHASH_ACC_MODE_MASK) | |||||
/** | |||||
****************************************************************************** | |||||
* @ingroup icp_qat_fw_comp | |||||
* | |||||
* @description | |||||
* Macro for setting of the xxHash accumulate mode bit | |||||
* | |||||
* @param flags Flags to set the xxHash accumulate mode bit to | |||||
* @param val xxHash accumulate mode to set | |||||
* | |||||
*****************************************************************************/ | |||||
#define ICP_QAT_FW_COMP_XXHASH_ACC_MODE_SET(flags, val) \ | |||||
QAT_FIELD_SET(flags, \ | |||||
val, \ | |||||
ICP_QAT_FW_COMP_XXHASH_ACC_MODE_BITPOS, \ | |||||
ICP_QAT_FW_COMP_XXHASH_ACC_MODE_MASK) | |||||
/** | |||||
****************************************************************************** | |||||
* @ingroup icp_qat_fw_comp | |||||
* Definition of the translator request parameters block | * Definition of the translator request parameters block | ||||
* @description | * @description | ||||
* Definition of the translator processing request parameters block | * Definition of the translator processing request parameters block | ||||
* The structure below forms part of the Compression + Translation | * The structure below forms part of the Compression + Translation | ||||
* Parameters block spanning LWs 20-21, thus differing from the common | * Parameters block spanning LWs 20-21, thus differing from the common | ||||
* base Parameters block structure. Unused fields must be set to 0. | * base Parameters block structure. Unused fields must be set to 0. | ||||
* | * | ||||
******************************************************************************/ | ******************************************************************************/ | ||||
typedef struct icp_qat_fw_xlt_req_params_s { | typedef struct icp_qat_fw_xlt_req_params_s { | ||||
/**< LWs 20-21 */ | /**< LWs 20-21 */ | ||||
uint64_t inter_buff_ptr; | uint64_t inter_buff_ptr; | ||||
/**< This field specifies the physical address of an intermediate | /**< This field specifies the physical address of an intermediate | ||||
* buffer SGL array. The array contains a pair of 64-bit | * buffer SGL array. The array contains a pair of 64-bit | ||||
* intermediate buffer pointers to SGL buffer descriptors, one pair | * intermediate buffer pointers to SGL buffer descriptors, one pair | ||||
* per CPM. Please refer to the CPM1.6 Firmware Interface HLD | * per CPM. Please refer to the CPM1.6 Firmware Interface HLD | ||||
* specification for more details. */ | * specification for more details. | ||||
* Placeholder for QAT2.0. */ | |||||
} icp_qat_fw_xlt_req_params_t; | } icp_qat_fw_xlt_req_params_t; | ||||
/** | /** | ||||
****************************************************************************** | ****************************************************************************** | ||||
* @ingroup icp_qat_fw_comp | * @ingroup icp_qat_fw_comp | ||||
* Compression header of the content descriptor block | * Compression header of the content descriptor block | ||||
* @description | * @description | ||||
* Definition of the service-specific compression control block header | * Definition of the service-specific compression control block header | ||||
▲ Show 20 Lines • Show All 416 Lines • ▼ Show 20 Lines | #define ICP_QAT_FW_COMP_RAM_FLAGS_BUILD(bank_i_enable, \ | ||||
(((bank_d_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \ | (((bank_d_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \ | ||||
<< QAT_FW_COMP_BANK_D_BITPOS) | \ | << QAT_FW_COMP_BANK_D_BITPOS) | \ | ||||
(((bank_c_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \ | (((bank_c_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \ | ||||
<< QAT_FW_COMP_BANK_C_BITPOS) | \ | << QAT_FW_COMP_BANK_C_BITPOS) | \ | ||||
(((bank_b_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \ | (((bank_b_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \ | ||||
<< QAT_FW_COMP_BANK_B_BITPOS) | \ | << QAT_FW_COMP_BANK_B_BITPOS) | \ | ||||
(((bank_a_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \ | (((bank_a_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \ | ||||
<< QAT_FW_COMP_BANK_A_BITPOS)) | << QAT_FW_COMP_BANK_A_BITPOS)) | ||||
/** | |||||
***************************************************************************** | |||||
* @ingroup icp_qat_fw_comp | |||||
* Definition of the xxhash32 acc state buffer | |||||
* @description | |||||
* This is data structure used in stateful lite for xxhash32 | |||||
* | |||||
*****************************************************************************/ | |||||
typedef struct xxhash_acc_state_buff_s { | |||||
/**< LW 0 */ | |||||
uint32_t in_counter; | |||||
/**< Accumulated (total) consumed bytes. As oppose to the per request | |||||
* IBC in the response.*/ | |||||
/**< LW 1 */ | |||||
uint32_t out_counter; | |||||
/**< OBC as in the response.*/ | |||||
/**< LW 2-5 */ | |||||
uint32_t xxhash_state[4]; | |||||
/**< Initial value is set by IA to the values stated in HAS.*/ | |||||
/**< LW 6-9 */ | |||||
uint32_t clear_txt[4]; | |||||
/**< Set to 0 for the first request.*/ | |||||
} xxhash_acc_state_buff_t; | |||||
#endif /* _ICP_QAT_FW_COMP_H_ */ | #endif /* _ICP_QAT_FW_COMP_H_ */ |