Changeset View
Changeset View
Standalone View
Standalone View
sys/amd64/amd64/mp_machdep.c
| Show First 20 Lines • Show All 855 Lines • ▼ Show 20 Lines | |||||
| #ifdef COUNT_XINVLTLB_HITS | #ifdef COUNT_XINVLTLB_HITS | ||||
| xhits_pg[PCPU_GET(cpuid)]++; | xhits_pg[PCPU_GET(cpuid)]++; | ||||
| #endif /* COUNT_XINVLTLB_HITS */ | #endif /* COUNT_XINVLTLB_HITS */ | ||||
| #ifdef COUNT_IPIS | #ifdef COUNT_IPIS | ||||
| (*ipi_invlpg_counts[PCPU_GET(cpuid)])++; | (*ipi_invlpg_counts[PCPU_GET(cpuid)])++; | ||||
| #endif /* COUNT_IPIS */ | #endif /* COUNT_IPIS */ | ||||
| invlpg(smp_tlb_addr1); | pmap_invlpg(smp_tlb_pmap, smp_tlb_addr1); | ||||
| if (smp_tlb_pmap == PCPU_GET(curpmap) && | if (smp_tlb_pmap == PCPU_GET(curpmap) && | ||||
| smp_tlb_pmap->pm_ucr3 != PMAP_NO_CR3 && | smp_tlb_pmap->pm_ucr3 != PMAP_NO_CR3 && | ||||
| PCPU_GET(ucr3_load_mask) == PMAP_UCR3_NOMASK) { | PCPU_GET(ucr3_load_mask) == PMAP_UCR3_NOMASK) { | ||||
| d.pcid = smp_tlb_pmap->pm_pcids[PCPU_GET(cpuid)].pm_pcid | | d.pcid = smp_tlb_pmap->pm_pcids[PCPU_GET(cpuid)].pm_pcid | | ||||
| PMAP_PCID_USER_PT; | PMAP_PCID_USER_PT; | ||||
| d.pad = 0; | d.pad = 0; | ||||
| d.addr = smp_tlb_addr1; | d.addr = smp_tlb_addr1; | ||||
| invpcid(&d, INVPCID_ADDR); | invpcid(&d, INVPCID_ADDR); | ||||
| } | } | ||||
| } | } | ||||
| static void | static void | ||||
| invlpg_pcid_handler(pmap_t smp_tlb_pmap, vm_offset_t smp_tlb_addr1) | invlpg_pcid_handler(pmap_t smp_tlb_pmap, vm_offset_t smp_tlb_addr1) | ||||
| { | { | ||||
| uint64_t kcr3, ucr3; | uint64_t kcr3, ucr3; | ||||
| uint32_t pcid; | uint32_t pcid; | ||||
| #ifdef COUNT_XINVLTLB_HITS | #ifdef COUNT_XINVLTLB_HITS | ||||
| xhits_pg[PCPU_GET(cpuid)]++; | xhits_pg[PCPU_GET(cpuid)]++; | ||||
| #endif /* COUNT_XINVLTLB_HITS */ | #endif /* COUNT_XINVLTLB_HITS */ | ||||
| #ifdef COUNT_IPIS | #ifdef COUNT_IPIS | ||||
| (*ipi_invlpg_counts[PCPU_GET(cpuid)])++; | (*ipi_invlpg_counts[PCPU_GET(cpuid)])++; | ||||
| #endif /* COUNT_IPIS */ | #endif /* COUNT_IPIS */ | ||||
| invlpg(smp_tlb_addr1); | pmap_invlpg(smp_tlb_pmap, smp_tlb_addr1); | ||||
alc: I'm confused by this change. Specifically, this function is used when invpcid_works is false. | |||||
Done Inline ActionsThis is a partially (minimally) done attempt to keep code working even with invpcid_works manually set to zero. I reverted this change for now. kib: This is a partially (minimally) done attempt to keep code working even with invpcid_works… | |||||
| if (smp_tlb_pmap == PCPU_GET(curpmap) && | if (smp_tlb_pmap == PCPU_GET(curpmap) && | ||||
| (ucr3 = smp_tlb_pmap->pm_ucr3) != PMAP_NO_CR3 && | (ucr3 = smp_tlb_pmap->pm_ucr3) != PMAP_NO_CR3 && | ||||
| PCPU_GET(ucr3_load_mask) == PMAP_UCR3_NOMASK) { | PCPU_GET(ucr3_load_mask) == PMAP_UCR3_NOMASK) { | ||||
| pcid = smp_tlb_pmap->pm_pcids[PCPU_GET(cpuid)].pm_pcid; | pcid = smp_tlb_pmap->pm_pcids[PCPU_GET(cpuid)].pm_pcid; | ||||
| kcr3 = smp_tlb_pmap->pm_cr3 | pcid | CR3_PCID_SAVE; | kcr3 = smp_tlb_pmap->pm_cr3 | pcid | CR3_PCID_SAVE; | ||||
| ucr3 |= pcid | PMAP_PCID_USER_PT | CR3_PCID_SAVE; | ucr3 |= pcid | PMAP_PCID_USER_PT | CR3_PCID_SAVE; | ||||
| pmap_pti_pcid_invlpg(ucr3, kcr3, smp_tlb_addr1); | pmap_pti_pcid_invlpg(ucr3, kcr3, smp_tlb_addr1); | ||||
| } | } | ||||
| Show All 28 Lines | |||||
| #ifdef COUNT_XINVLTLB_HITS | #ifdef COUNT_XINVLTLB_HITS | ||||
| xhits_rng[PCPU_GET(cpuid)]++; | xhits_rng[PCPU_GET(cpuid)]++; | ||||
| #endif /* COUNT_XINVLTLB_HITS */ | #endif /* COUNT_XINVLTLB_HITS */ | ||||
| #ifdef COUNT_IPIS | #ifdef COUNT_IPIS | ||||
| (*ipi_invlrng_counts[PCPU_GET(cpuid)])++; | (*ipi_invlrng_counts[PCPU_GET(cpuid)])++; | ||||
| #endif /* COUNT_IPIS */ | #endif /* COUNT_IPIS */ | ||||
| addr = smp_tlb_addr1; | addr = smp_tlb_addr1; | ||||
| if (smp_tlb_pmap == kernel_pmap && PCPU_GET(pcid_invlpg_bug)) { | |||||
| struct invpcid_descr d = { 0 }; | |||||
| invpcid(&d, INVPCID_CTXGLOB); | |||||
| } else { | |||||
| do { | do { | ||||
| invlpg(addr); | invlpg(addr); | ||||
| addr += PAGE_SIZE; | addr += PAGE_SIZE; | ||||
| } while (addr < smp_tlb_addr2); | } while (addr < smp_tlb_addr2); | ||||
| } | |||||
| if (smp_tlb_pmap == PCPU_GET(curpmap) && | if (smp_tlb_pmap == PCPU_GET(curpmap) && | ||||
| smp_tlb_pmap->pm_ucr3 != PMAP_NO_CR3 && | smp_tlb_pmap->pm_ucr3 != PMAP_NO_CR3 && | ||||
| PCPU_GET(ucr3_load_mask) == PMAP_UCR3_NOMASK) { | PCPU_GET(ucr3_load_mask) == PMAP_UCR3_NOMASK) { | ||||
| d.pcid = smp_tlb_pmap->pm_pcids[PCPU_GET(cpuid)].pm_pcid | | d.pcid = smp_tlb_pmap->pm_pcids[PCPU_GET(cpuid)].pm_pcid | | ||||
| PMAP_PCID_USER_PT; | PMAP_PCID_USER_PT; | ||||
| d.pad = 0; | d.pad = 0; | ||||
| d.addr = smp_tlb_addr1; | d.addr = smp_tlb_addr1; | ||||
| do { | do { | ||||
| ▲ Show 20 Lines • Show All 147 Lines • Show Last 20 Lines | |||||
I'm confused by this change. Specifically, this function is used when invpcid_works is false. Is that ever going to be the case on the broken cores? Moreover, if the change is required here, then I would also expect to see a similar change in invlrng_pcid_handler().