Differential D37428 Diff 113252 sys/arm64/arm64/identcpu.c

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sys/arm64/arm64/identcpu.c

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SYSCTL_PROC(_hw, HW_MACHINE, machine, CTLTYPE_STRING \| CTLFLAG_RD \|		SYSCTL_PROC(_hw, HW_MACHINE, machine, CTLTYPE_STRING \| CTLFLAG_RD \|
CTLFLAG_MPSAFE, NULL, 0, sysctl_hw_machine, "A", "Machine class");		CTLFLAG_MPSAFE, NULL, 0, sysctl_hw_machine, "A", "Machine class");

static char cpu_model[64];		static char cpu_model[64];
SYSCTL_STRING(_hw, HW_MODEL, model, CTLFLAG_RD,		SYSCTL_STRING(_hw, HW_MODEL, model, CTLFLAG_RD,
cpu_model, sizeof(cpu_model), "Machine model");		cpu_model, sizeof(cpu_model), "Machine model");

#define MAX_CACHES 8 /* Maximum number of caches supported
corvinkUnsubmitted Not Done Inline Actions This and some other parts could be merged in a seperate review. Splitting should speed up reviewing a bit. corvink: This and some other parts could be merged in a seperate review. Splitting should speed up…
andrewAuthorUnsubmitted Done Inline Actions My plan is to not move this, but will need to decide on a new KPI for vmm.ko to use. andrew: My plan is to not move this, but will need to decide on a new KPI for vmm.ko to use.
architecturally. */
/*		/*
* Per-CPU affinity as provided in MPIDR_EL1		* Per-CPU affinity as provided in MPIDR_EL1
* Indexed by CPU number in logical order selected by the system.		* Indexed by CPU number in logical order selected by the system.
* Relevant fields can be extracted using CPU_AFFn macros,		* Relevant fields can be extracted using CPU_AFFn macros,
* Aff3.Aff2.Aff1.Aff0 construct a unique CPU address in the system.		* Aff3.Aff2.Aff1.Aff0 construct a unique CPU address in the system.
*		*
* Fields used by us:		* Fields used by us:
* Aff1 - Cluster number		* Aff1 - Cluster number
* Aff0 - CPU number in Aff1 cluster		* Aff0 - CPU number in Aff1 cluster
*/		*/
uint64_t __cpu_affinity[MAXCPU];		uint64_t __cpu_affinity[MAXCPU];
static u_int cpu_aff_levels;		static u_int cpu_aff_levels;

struct cpu_desc {
uint64_t mpidr;
uint64_t id_aa64afr0;
uint64_t id_aa64afr1;
uint64_t id_aa64dfr0;
uint64_t id_aa64dfr1;
uint64_t id_aa64isar0;
uint64_t id_aa64isar1;
uint64_t id_aa64isar2;
uint64_t id_aa64mmfr0;
uint64_t id_aa64mmfr1;
uint64_t id_aa64mmfr2;
uint64_t id_aa64pfr0;
uint64_t id_aa64pfr1;
uint64_t id_aa64zfr0;
uint64_t ctr;
#ifdef COMPAT_FREEBSD32
uint64_t id_isar5;
uint64_t mvfr0;
uint64_t mvfr1;
#endif
uint64_t clidr;
uint32_t ccsidr[MAX_CACHES][2]; /* 2 possible types. */
bool have_sve;
};

static struct cpu_desc cpu_desc[MAXCPU];		static struct cpu_desc cpu_desc[MAXCPU];
static struct cpu_desc kern_cpu_desc;		static struct cpu_desc kern_cpu_desc;
static struct cpu_desc user_cpu_desc;		static struct cpu_desc user_cpu_desc;

struct cpu_parts {		struct cpu_parts {
u_int part_id;		u_int part_id;
const char *part_name;		const char *part_name;
};		};
▲ Show 20 Lines • Show All 1,660 Lines • ▼ Show 20 Lines	for (j = 0; fields[j].type != 0; j++) {
panic("Invalid field type: %d", fields[j].type);		panic("Invalid field type: %d", fields[j].type);
}		}
kern_reg = update_lower_register(kern_reg, value,		kern_reg = update_lower_register(kern_reg, value,
fields[j].shift, 4, fields[j].sign);		fields[j].shift, 4, fields[j].sign);
}		}

CPU_DESC_FIELD(kern_cpu_desc, i) = kern_reg;		CPU_DESC_FIELD(kern_cpu_desc, i) = kern_reg;
CPU_DESC_FIELD(user_cpu_desc, i) = user_reg;		CPU_DESC_FIELD(user_cpu_desc, i) = user_reg;
		}
		}

		void
		update_cpu_desc(struct cpu_desc *desc)
		{
		struct mrs_field *fields;
		uint64_t desc_val, kern_val;
		int i, j;

		for (i = 0; i < nitems(user_regs); i++) {
		kern_val = CPU_DESC_FIELD(kern_cpu_desc, i);
		desc_val = CPU_DESC_FIELD(*desc, i);

		fields = user_regs[i].fields;
		for (j = 0; fields[j].type != 0; j++) {
		desc_val = update_lower_register(desc_val, kern_val,
		fields[j].shift, 4, fields[j].sign);
		}

		CPU_DESC_FIELD(*desc, i) = desc_val;
}		}
}		}

/* HWCAP */		/* HWCAP */
bool __read_frequently lse_supported = false;		bool __read_frequently lse_supported = false;

bool __read_frequently icache_aliasing = false;		bool __read_frequently icache_aliasing = false;
bool __read_frequently icache_vmid = false;		bool __read_frequently icache_vmid = false;
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