Differential D4885 Diff 12201 head/sys/dev/sfxge/common/hunt_nvram.c

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head/sys/dev/sfxge/common/hunt_nvram.c

Show First 20 Lines • Show All 1,503 Lines • ▼ Show 20 Lines	fail1:

return (rc);		return (rc);
}		}

#endif /* EFSYS_OPT_VPD \|\| EFSYS_OPT_NVRAM */		#endif /* EFSYS_OPT_VPD \|\| EFSYS_OPT_NVRAM */

#if EFSYS_OPT_NVRAM		#if EFSYS_OPT_NVRAM

/* FIXME: Update partition table for Medford */

typedef struct ef10_parttbl_entry_s {		typedef struct ef10_parttbl_entry_s {
unsigned int partn;		unsigned int partn;
unsigned int port;		unsigned int port;
efx_nvram_type_t nvtype;		efx_nvram_type_t nvtype;
} ef10_parttbl_entry_t;		} ef10_parttbl_entry_t;

/* Translate EFX NVRAM types to firmware partition types */		/* Translate EFX NVRAM types to firmware partition types */
static ef10_parttbl_entry_t ef10_parttbl[] = {		static ef10_parttbl_entry_t hunt_parttbl[] = {
{NVRAM_PARTITION_TYPE_MC_FIRMWARE, 1, EFX_NVRAM_MC_FIRMWARE},		{NVRAM_PARTITION_TYPE_MC_FIRMWARE, 1, EFX_NVRAM_MC_FIRMWARE},
{NVRAM_PARTITION_TYPE_MC_FIRMWARE, 2, EFX_NVRAM_MC_FIRMWARE},		{NVRAM_PARTITION_TYPE_MC_FIRMWARE, 2, EFX_NVRAM_MC_FIRMWARE},
{NVRAM_PARTITION_TYPE_MC_FIRMWARE, 3, EFX_NVRAM_MC_FIRMWARE},		{NVRAM_PARTITION_TYPE_MC_FIRMWARE, 3, EFX_NVRAM_MC_FIRMWARE},
{NVRAM_PARTITION_TYPE_MC_FIRMWARE, 4, EFX_NVRAM_MC_FIRMWARE},		{NVRAM_PARTITION_TYPE_MC_FIRMWARE, 4, EFX_NVRAM_MC_FIRMWARE},
{NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP, 1, EFX_NVRAM_MC_GOLDEN},		{NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP, 1, EFX_NVRAM_MC_GOLDEN},
{NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP, 2, EFX_NVRAM_MC_GOLDEN},		{NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP, 2, EFX_NVRAM_MC_GOLDEN},
{NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP, 3, EFX_NVRAM_MC_GOLDEN},		{NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP, 3, EFX_NVRAM_MC_GOLDEN},
{NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP, 4, EFX_NVRAM_MC_GOLDEN},		{NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP, 4, EFX_NVRAM_MC_GOLDEN},
Show All 14 Lines	static ef10_parttbl_entry_t hunt_parttbl[] = {
{NVRAM_PARTITION_TYPE_FPGA, 3, EFX_NVRAM_FPGA},		{NVRAM_PARTITION_TYPE_FPGA, 3, EFX_NVRAM_FPGA},
{NVRAM_PARTITION_TYPE_FPGA, 4, EFX_NVRAM_FPGA},		{NVRAM_PARTITION_TYPE_FPGA, 4, EFX_NVRAM_FPGA},
{NVRAM_PARTITION_TYPE_FPGA_BACKUP, 1, EFX_NVRAM_FPGA_BACKUP},		{NVRAM_PARTITION_TYPE_FPGA_BACKUP, 1, EFX_NVRAM_FPGA_BACKUP},
{NVRAM_PARTITION_TYPE_FPGA_BACKUP, 2, EFX_NVRAM_FPGA_BACKUP},		{NVRAM_PARTITION_TYPE_FPGA_BACKUP, 2, EFX_NVRAM_FPGA_BACKUP},
{NVRAM_PARTITION_TYPE_FPGA_BACKUP, 3, EFX_NVRAM_FPGA_BACKUP},		{NVRAM_PARTITION_TYPE_FPGA_BACKUP, 3, EFX_NVRAM_FPGA_BACKUP},
{NVRAM_PARTITION_TYPE_FPGA_BACKUP, 4, EFX_NVRAM_FPGA_BACKUP}		{NVRAM_PARTITION_TYPE_FPGA_BACKUP, 4, EFX_NVRAM_FPGA_BACKUP}
};		};

		static ef10_parttbl_entry_t medford_parttbl[] = {
		{NVRAM_PARTITION_TYPE_MC_FIRMWARE, 1, EFX_NVRAM_MC_FIRMWARE},
		{NVRAM_PARTITION_TYPE_MC_FIRMWARE, 2, EFX_NVRAM_MC_FIRMWARE},
		{NVRAM_PARTITION_TYPE_MC_FIRMWARE, 3, EFX_NVRAM_MC_FIRMWARE},
		{NVRAM_PARTITION_TYPE_MC_FIRMWARE, 4, EFX_NVRAM_MC_FIRMWARE},
		{NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP, 1, EFX_NVRAM_MC_GOLDEN},
		{NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP, 2, EFX_NVRAM_MC_GOLDEN},
		{NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP, 3, EFX_NVRAM_MC_GOLDEN},
		{NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP, 4, EFX_NVRAM_MC_GOLDEN},
		{NVRAM_PARTITION_TYPE_EXPANSION_ROM, 1, EFX_NVRAM_BOOTROM},
		{NVRAM_PARTITION_TYPE_EXPANSION_ROM, 2, EFX_NVRAM_BOOTROM},
		{NVRAM_PARTITION_TYPE_EXPANSION_ROM, 3, EFX_NVRAM_BOOTROM},
		{NVRAM_PARTITION_TYPE_EXPANSION_ROM, 4, EFX_NVRAM_BOOTROM},
		{NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT0, 1, EFX_NVRAM_BOOTROM_CFG},
		{NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT0, 2, EFX_NVRAM_BOOTROM_CFG},
		{NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT0, 3, EFX_NVRAM_BOOTROM_CFG},
		{NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT0, 4, EFX_NVRAM_BOOTROM_CFG},
		{NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG, 1, EFX_NVRAM_DYNAMIC_CFG},
		{NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG, 2, EFX_NVRAM_DYNAMIC_CFG},
		{NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG, 3, EFX_NVRAM_DYNAMIC_CFG},
		{NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG, 4, EFX_NVRAM_DYNAMIC_CFG},
		{NVRAM_PARTITION_TYPE_FPGA, 1, EFX_NVRAM_FPGA},
		{NVRAM_PARTITION_TYPE_FPGA, 2, EFX_NVRAM_FPGA},
		{NVRAM_PARTITION_TYPE_FPGA, 3, EFX_NVRAM_FPGA},
		{NVRAM_PARTITION_TYPE_FPGA, 4, EFX_NVRAM_FPGA},
		{NVRAM_PARTITION_TYPE_FPGA_BACKUP, 1, EFX_NVRAM_FPGA_BACKUP},
		{NVRAM_PARTITION_TYPE_FPGA_BACKUP, 2, EFX_NVRAM_FPGA_BACKUP},
		{NVRAM_PARTITION_TYPE_FPGA_BACKUP, 3, EFX_NVRAM_FPGA_BACKUP},
		{NVRAM_PARTITION_TYPE_FPGA_BACKUP, 4, EFX_NVRAM_FPGA_BACKUP}
		};

static __checkReturn ef10_parttbl_entry_t *		static __checkReturn ef10_parttbl_entry_t *
ef10_parttbl_entry(		ef10_parttbl_entry(
__in efx_nic_t *enp,		__in efx_nic_t *enp,
__in efx_nvram_type_t type)		__in efx_nvram_type_t type)
{		{
efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);		efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
ef10_parttbl_entry_t *entry;		ef10_parttbl_entry_t *entry;
int i;		ef10_parttbl_entry_t *parttbl;
		size_t parttbl_size = 0;
		unsigned int i;

EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);		EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);

for (i = 0; i < EFX_ARRAY_SIZE(ef10_parttbl); i++) {		switch (enp->en_family) {
entry = &ef10_parttbl[i];		case EFX_FAMILY_HUNTINGTON:
		parttbl = hunt_parttbl;
		parttbl_size = EFX_ARRAY_SIZE(hunt_parttbl);
		break;

if (entry->port == emip->emi_port && entry->nvtype == type)		case EFX_FAMILY_MEDFORD:
return (entry);		parttbl = medford_parttbl;
		parttbl_size = EFX_ARRAY_SIZE(medford_parttbl);
		break;

		default:
		EFSYS_ASSERT(B_FALSE);
		goto not_found;
}		}

		if (parttbl != NULL) {
		for (i = 0; i < parttbl_size; i++) {
		entry = &parttbl[i];

		if (entry->port == emip->emi_port &&
		entry->nvtype == type) {
		return (entry);
		}
		}
		}
		not_found:
return (NULL);		return (NULL);
}		}


#if EFSYS_OPT_DIAG		#if EFSYS_OPT_DIAG

__checkReturn efx_rc_t		__checkReturn efx_rc_t
ef10_nvram_test(		ef10_nvram_test(
__in efx_nic_t *enp)		__in efx_nic_t *enp)
{		{
efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);		efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
ef10_parttbl_entry_t *entry;		ef10_parttbl_entry_t *entry;
		ef10_parttbl_entry_t *parttbl;
		size_t parttbl_size = 0;
unsigned int npartns = 0;		unsigned int npartns = 0;
uint32_t *partns = NULL;		uint32_t *partns = NULL;
size_t size;		size_t size;
int i;		unsigned int i;
unsigned int j;		unsigned int j;
efx_rc_t rc;		efx_rc_t rc;

/* Find supported partitions */		/* Find supported partitions */
size = MC_CMD_NVRAM_PARTITIONS_OUT_TYPE_ID_MAXNUM * sizeof (uint32_t);		size = MC_CMD_NVRAM_PARTITIONS_OUT_TYPE_ID_MAXNUM * sizeof (uint32_t);
EFSYS_KMEM_ALLOC(enp->en_esip, size, partns);		EFSYS_KMEM_ALLOC(enp->en_esip, size, partns);
if (partns == NULL) {		if (partns == NULL) {
rc = ENOMEM;		rc = ENOMEM;
goto fail1;		goto fail1;
}		}

if ((rc = efx_mcdi_nvram_partitions(enp, (caddr_t)partns, size,		if ((rc = efx_mcdi_nvram_partitions(enp, (caddr_t)partns, size,
&npartns)) != 0) {		&npartns)) != 0) {
goto fail2;		goto fail2;
}		}

/*		/*
* Iterate over the list of supported partition types		* Iterate over the list of supported partition types
* applicable to this port		* applicable to this port
*/		*/
for (i = 0; i < EFX_ARRAY_SIZE(ef10_parttbl); i++) {		switch (enp->en_family) {
entry = &ef10_parttbl[i];		case EFX_FAMILY_HUNTINGTON:
		parttbl = hunt_parttbl;
		parttbl_size = EFX_ARRAY_SIZE(hunt_parttbl);
		break;

		case EFX_FAMILY_MEDFORD:
		parttbl = medford_parttbl;
		parttbl_size = EFX_ARRAY_SIZE(medford_parttbl);
		break;

		default:
		EFSYS_ASSERT(B_FALSE);
		goto fail3;
		}

		for (i = 0; i < parttbl_size; i++) {
		entry = &parttbl[i];

if (entry->port != emip->emi_port)		if (entry->port != emip->emi_port)
continue;		continue;

for (j = 0; j < npartns; j++) {		for (j = 0; j < npartns; j++) {
if (entry->partn == partns[j]) {		if (entry->partn == partns[j]) {
rc = efx_mcdi_nvram_test(enp, entry->partn);		rc = efx_mcdi_nvram_test(enp, entry->partn);
if (rc != 0)		if (rc != 0)
goto fail3;		goto fail4;
}		}
}		}
}		}

EFSYS_KMEM_FREE(enp->en_esip, size, partns);		EFSYS_KMEM_FREE(enp->en_esip, size, partns);
return (0);		return (0);

		fail4:
		EFSYS_PROBE(fail3);
fail3:		fail3:
EFSYS_PROBE(fail3);		EFSYS_PROBE(fail3);
fail2:		fail2:
EFSYS_PROBE(fail2);		EFSYS_PROBE(fail2);
EFSYS_KMEM_FREE(enp->en_esip, size, partns);		EFSYS_KMEM_FREE(enp->en_esip, size, partns);
fail1:		fail1:
EFSYS_PROBE1(fail1, efx_rc_t, rc);		EFSYS_PROBE1(fail1, efx_rc_t, rc);
return (rc);		return (rc);
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