Differential D34802 Diff 104920 sys/amd64/include/cpufunc.h

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sys/amd64/include/cpufunc.h

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	#define readl(va) ((volatile uint32_t ) (va))			#define readl(va) ((volatile uint32_t ) (va))
	#define readq(va) ((volatile uint64_t ) (va))			#define readq(va) ((volatile uint64_t ) (va))

	#define writeb(va, d) ((volatile uint8_t ) (va) = (d))			#define writeb(va, d) ((volatile uint8_t ) (va) = (d))
	#define writew(va, d) ((volatile uint16_t ) (va) = (d))			#define writew(va, d) ((volatile uint16_t ) (va) = (d))
	#define writel(va, d) ((volatile uint32_t ) (va) = (d))			#define writel(va, d) ((volatile uint32_t ) (va) = (d))
	#define writeq(va, d) ((volatile uint64_t ) (va) = (d))			#define writeq(va, d) ((volatile uint64_t ) (va) = (d))

	#if defined(__CC_SUPPORTS___INLINE)

	static __inline void			static __inline void
	breakpoint(void)			breakpoint(void)
	{			{
	__asm __volatile("int $3");			__asm __volatile("int $3");
	}			}

	#define bsfl(mask) __builtin_ctz(mask)			#define bsfl(mask) __builtin_ctz(mask)

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	}			}

	static __inline int			static __inline int
	sgx_eremove(void *epc)			sgx_eremove(void *epc)
	{			{

	return (sgx_encls(SGX_EREMOVE, 0, (uint64_t)epc, 0));			return (sgx_encls(SGX_EREMOVE, 0, (uint64_t)epc, 0));
	}			}

	#else /* !__CC_SUPPORTS___INLINE */

	int breakpoint(void);
	u_int bsfl(u_int mask);
	u_int bsrl(u_int mask);
	void clflush(u_long addr);
	void clts(void);
	void cpuid_count(u_int ax, u_int cx, u_int *p);
	void disable_intr(void);
	void do_cpuid(u_int ax, u_int *p);
	void enable_intr(void);
	void halt(void);
	void ia32_pause(void);
	u_char inb(u_int port);
	u_int inl(u_int port);
	void insb(u_int port, void *addr, size_t count);
	void insl(u_int port, void *addr, size_t count);
	void insw(u_int port, void *addr, size_t count);
	register_t intr_disable(void);
	void intr_restore(register_t rf);
	void invd(void);
	void invlpg(u_int addr);
	void invltlb(void);
	u_short inw(u_int port);
	void lidt(struct region_descriptor *addr);
	void lldt(u_short sel);
	void load_cr0(u_long cr0);
	void load_cr3(u_long cr3);
	void load_cr4(u_long cr4);
	void load_dr0(uint64_t dr0);
	void load_dr1(uint64_t dr1);
	void load_dr2(uint64_t dr2);
	void load_dr3(uint64_t dr3);
	void load_dr6(uint64_t dr6);
	void load_dr7(uint64_t dr7);
	void load_fs(u_short sel);
	void load_gs(u_short sel);
	void ltr(u_short sel);
	void outb(u_int port, u_char data);
	void outl(u_int port, u_int data);
	void outsb(u_int port, const void *addr, size_t count);
	void outsl(u_int port, const void *addr, size_t count);
	void outsw(u_int port, const void *addr, size_t count);
	void outw(u_int port, u_short data);
	u_long rcr0(void);
	u_long rcr2(void);
	u_long rcr3(void);
	u_long rcr4(void);
	uint64_t rdmsr(u_int msr);
	uint32_t rdmsr32(u_int msr);
	uint64_t rdpmc(u_int pmc);
	uint64_t rdr0(void);
	uint64_t rdr1(void);
	uint64_t rdr2(void);
	uint64_t rdr3(void);
	uint64_t rdr6(void);
	uint64_t rdr7(void);
	uint64_t rdtsc(void);
	u_long read_rflags(void);
	u_int rfs(void);
	u_int rgs(void);
	void wbinvd(void);
	void write_rflags(u_int rf);
	void wrmsr(u_int msr, uint64_t newval);

	#endif /* __CC_SUPPORTS___INLINE */

	void reset_dbregs(void);			void reset_dbregs(void);

	#ifdef _KERNEL			#ifdef _KERNEL
	int rdmsr_safe(u_int msr, uint64_t *val);			int rdmsr_safe(u_int msr, uint64_t *val);
	int wrmsr_safe(u_int msr, uint64_t newval);			int wrmsr_safe(u_int msr, uint64_t newval);
	#endif			#endif

	#endif /* !_MACHINE_CPUFUNC_H_ */			#endif /* !_MACHINE_CPUFUNC_H_ */