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sys/arm64/arm64/busdma_bounce.c
| Show First 20 Lines • Show All 222 Lines • ▼ Show 20 Lines | if (error != 0) | ||||
| return (error); | return (error); | ||||
| newtag->common.impl = &bus_dma_bounce_impl; | newtag->common.impl = &bus_dma_bounce_impl; | ||||
| newtag->map_count = 0; | newtag->map_count = 0; | ||||
| newtag->segments = NULL; | newtag->segments = NULL; | ||||
| if ((flags & BUS_DMA_COHERENT) != 0) { | if ((flags & BUS_DMA_COHERENT) != 0) { | ||||
| newtag->bounce_flags |= BF_COHERENT; | newtag->bounce_flags |= BF_COHERENT; | ||||
| } | |||||
| if (parent != NULL) { | |||||
| if ((newtag->common.filter != NULL || | |||||
| (parent->bounce_flags & BF_COULD_BOUNCE) != 0)) | |||||
| newtag->bounce_flags |= BF_COULD_BOUNCE; | |||||
| /* Copy some flags from the parent */ | |||||
| newtag->bounce_flags |= parent->bounce_flags & BF_COHERENT; | |||||
| } | |||||
| if ((newtag->bounce_flags & BF_COHERENT) != 0) { | |||||
| newtag->alloc_alignment = newtag->common.alignment; | newtag->alloc_alignment = newtag->common.alignment; | ||||
| newtag->alloc_size = newtag->common.maxsize; | newtag->alloc_size = newtag->common.maxsize; | ||||
| } else { | } else { | ||||
| /* | /* | ||||
| * Ensure the buffer is aligned to a cacheline when allocating | * Ensure the buffer is aligned to a cacheline when allocating | ||||
| * a non-coherent buffer. This is so we don't have any data | * a non-coherent buffer. This is so we don't have any data | ||||
| * that another CPU may be accessing around DMA buffer | * that another CPU may be accessing around DMA buffer | ||||
| * causing the cache to become dirty. | * causing the cache to become dirty. | ||||
| */ | */ | ||||
| newtag->alloc_alignment = MAX(newtag->common.alignment, | newtag->alloc_alignment = MAX(newtag->common.alignment, | ||||
| dcache_line_size); | dcache_line_size); | ||||
| newtag->alloc_size = roundup2(newtag->common.maxsize, | newtag->alloc_size = roundup2(newtag->common.maxsize, | ||||
| dcache_line_size); | dcache_line_size); | ||||
| } | |||||
| if (parent != NULL) { | |||||
| if ((newtag->common.filter != NULL || | |||||
| (parent->bounce_flags & BF_COULD_BOUNCE) != 0)) | |||||
| newtag->bounce_flags |= BF_COULD_BOUNCE; | |||||
| /* Copy some flags from the parent */ | |||||
| newtag->bounce_flags |= parent->bounce_flags & BF_COHERENT; | |||||
| } | } | ||||
| if (newtag->common.lowaddr < ptoa((vm_paddr_t)Maxmem) || | if (newtag->common.lowaddr < ptoa((vm_paddr_t)Maxmem) || | ||||
| newtag->common.alignment > 1) | newtag->common.alignment > 1) | ||||
| newtag->bounce_flags |= BF_COULD_BOUNCE; | newtag->bounce_flags |= BF_COULD_BOUNCE; | ||||
| if ((flags & BUS_DMA_ALLOCNOW) != 0) { | if ((flags & BUS_DMA_ALLOCNOW) != 0) { | ||||
| struct bounce_zone *bz; | struct bounce_zone *bz; | ||||
| ▲ Show 20 Lines • Show All 907 Lines • Show Last 20 Lines | |||||