diff --git a/lang/silq/Makefile b/lang/silq/Makefile
index ce8ce6bc9d27..2b493dfb814c 100644
--- a/lang/silq/Makefile
+++ b/lang/silq/Makefile
@@ -1,32 +1,39 @@
 PORTNAME=	silq
-PORTVERSION=	20210503
+PORTVERSION=	20211117
 CATEGORIES=	lang math science
 
 MAINTAINER=	se@FreeBSD.org
 COMMENT=	Silq from ETH Zuerich
 
 LICENSE=	BSL
 LICENSE_FILE=	${WRKSRC}/LICENSE
 
 ONLY_FOR_ARCHS=	amd64
 ONLY_FOR_ARCHS_REASON=	unknown status of the D language compiler (lang/ldc) on ${ARCH}
 
-BUILD_DEPENDS=	ldmd2:lang/ldc
+BUILD_DEPENDS=	ldmd2:lang/ldc \
+		llvm${LLVM_VERSION}>0:devel/llvm${LLVM_VERSION}
 
 USE_GITHUB=	yes
 
-GH_TUPLE=	eth-sri:silq:c0029ff \
-		tgehr:ast:cfa0289:ast/ast \
-		tgehr:util:eb42377:util/util
+GH_TUPLE=	eth-sri:silq:1bc7ece \
+		tgehr:ast:7c26e76:ast/ast \
+		tgehr:util:7e9f0ce:util/util
 
 OPTIONS_DEFINE=	EXAMPLES
 
+LLVM_VERSION=	10
+
+.include <bsd.port.options.mk>
+
 do-build:
-		cd ${WRKSRC}; ldmd2 -O -inline -J. -Jlibrary *.d ast/*.d util/*.d -linker=lld -of=silq
+		cd ${WRKSRC}; ldmd2 -O -inline -J. -Jlibrary *.d ast/*.d util/*.d -linker=lld${LLVM_VERSION} -of=silq
 
 do-install:
 		${INSTALL_PROGRAM} ${WRKSRC}/silq ${STAGEDIR}${PREFIX}/bin/
+.if ${PORT_OPTIONS:MEXAMPLES}
 		${MKDIR} ${STAGEDIR}${EXAMPLESDIR}
 		cd ${WRKSRC}/test && ${COPYTREE_SHARE} . ${STAGEDIR}${EXAMPLESDIR} "-name *\.slq"
+.endif
 
 .include <bsd.port.mk>
diff --git a/lang/silq/distinfo b/lang/silq/distinfo
index bdbf7bbb503f..d3344e178e18 100644
--- a/lang/silq/distinfo
+++ b/lang/silq/distinfo
@@ -1,7 +1,7 @@
-TIMESTAMP = 1620025724
-SHA256 (eth-sri-silq-20210503-c0029ff_GH0.tar.gz) = 3cc68bc91bd1d102fd153e50652280303a30a66cd188ab61287797674e06e032
-SIZE (eth-sri-silq-20210503-c0029ff_GH0.tar.gz) = 240778
-SHA256 (tgehr-ast-cfa0289_GH0.tar.gz) = 3fe66c32c761cfefb376db087d5d137bdcc5ce1f824d8f672c6fea139639e7ba
-SIZE (tgehr-ast-cfa0289_GH0.tar.gz) = 74430
-SHA256 (tgehr-util-eb42377_GH0.tar.gz) = 52dee367fb158d604cf80dff8b576adf61de0c34d7f0d4f9548f403049602ddd
-SIZE (tgehr-util-eb42377_GH0.tar.gz) = 9457
+TIMESTAMP = 1637153546
+SHA256 (eth-sri-silq-20211117-1bc7ece_GH0.tar.gz) = 9c51050b234373bb79762384cbd5556df6962fbb60e08e2e72e4e43556cdb639
+SIZE (eth-sri-silq-20211117-1bc7ece_GH0.tar.gz) = 242312
+SHA256 (tgehr-ast-7c26e76_GH0.tar.gz) = cd67b2e1ce6426ddfab4b0772b7c9812f4d3008293953f4420e06be4db2d2450
+SIZE (tgehr-ast-7c26e76_GH0.tar.gz) = 75083
+SHA256 (tgehr-util-7e9f0ce_GH0.tar.gz) = f73af612a6aa14c966cc46f392394d8c43b90ecf8c0be0c44b509cc07a7e949f
+SIZE (tgehr-util-7e9f0ce_GH0.tar.gz) = 9455
diff --git a/lang/silq/pkg-plist b/lang/silq/pkg-plist
index 1366c8a3ea51..f9fddea1b798 100644
--- a/lang/silq/pkg-plist
+++ b/lang/silq/pkg-plist
@@ -1,393 +1,411 @@
 bin/silq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/arrayAddAssign.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/arrayConcatReassign.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/arrayElements.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/arrayEntryDup.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/asinQ.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/asinQ2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/assertTypeError.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/assignError.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/assignFromArray.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/assignQcontrol.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/assignQuantumArray.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/badForget.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/badIndexReplacement.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/badReverse.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/badTypes.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/bernsteinVazirani.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/bernsteinVazirani2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/boolVectorLength.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/bug.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/builtInToPrelude.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureConst.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureShadow.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureTwice.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/classicalArrayAliasing.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/classicalHadamard.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/classicalQfree1.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/classicalQfree2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/classicalQuantumSuperposition.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/closure.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/closureArrayTest.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/closureTest.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/closureTest2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/closureTest3.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/closureTest4.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/closureTest5.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/closureTest6.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/closureTest7.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/closureTest8.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/cnot.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/cnot2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/stats/top10submissions/winter19/A1/1.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/stats/top10submissions/winter19/A1/2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/stats/top10submissions/winter19/A1/3.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/stats/top10submissions/winter19/A1/4.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/stats/top10submissions/winter19/A1/5.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/stats/top10submissions/winter19/A1/6.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/stats/top10submissions/winter19/A1/7.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/stats/top10submissions/winter19/A2/2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/stats/top10submissions/winter19/A2/2_incorrect.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/stats/top10submissions/winter19/B1/4.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/stats/top10submissions/winter19/C2/8.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/a1.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/a2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/a3.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/a4.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/b1.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/b2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/b3.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/b4.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/c1.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/c2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/d1.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/d2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/d3.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/e1.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/e2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/a.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/b.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/c.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/d.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/e.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/f.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/f2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/g.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/h.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/i.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/warmup/a1.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/warmup/a2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/warmup/a3.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/warmup/a4.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/warmup/a5.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/warmup/b1.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/warmup/b2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/warmup/c.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/a1.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/a2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/b1.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/b2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/c1.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/c2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/c3.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/c3_2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/d1.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/d2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/d3.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/d4.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/d5.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/contest/d6.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/warmup/g1.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/warmup/g2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/warmup/g3.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/warmup/u1.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/warmup/u2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/winter19/warmup/u3.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/coerceAssign.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/coerceFunction.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/coerceInt.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/coerceIntToNat.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/coerceNegativeNatural.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/coerceReal.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/coerceVector.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/communicationGame.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/conditionalMeasurement.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/conditionalMeasurement2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/constBlockAssign.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/constBlockCapture.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/consumeDepTypeVar.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/consumingVector.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/conv.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/convertForget.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/convertIntToZ.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/convertMatch.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/convertMatch2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/convertNatToInt.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/convertTuple.slq
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/convertVectors.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/depTest.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/depTest2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/depTest3.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/depTest4.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/depTest5.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/depTest6.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/depType.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/detectZero.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/distinguish0H0.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/distinguish0H0_2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/distinguishGHZandW.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/distinguishStates.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/divbyzero.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/divbyzero2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/divmod.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/dlog.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/dump.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/dump2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/dumpExit.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/dumpExit2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/dupClosure.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/dupClosure2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/dupConvertForget.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn3.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn4.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn5.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn6.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn7.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn8.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturnQuantumIf.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/extendTruncate.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/extendTruncateError.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/fib.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/fib2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/flipAll.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/for.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forStep.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetChain.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetClassical.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetCoerce.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetCoerce2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetCoerce3.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetCoerce4.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetCoerce5.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetCoerce6.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetConst.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetConstInvalid.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetDup.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetDup2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetIfThenElse.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetIfThenElseInvalid.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetIndexSlice.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetNonReconstructableInvalid.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetRedefine.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetSpecialPatterns.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetSynthesis.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetSynthesis2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetSynthesis3.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetWhile.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/fromW.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/functionBodyParseError.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/genericAddition.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/genericReverse.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/grover.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/grover2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/groverDiffusion.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/hIndex.slq
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/hidingIndexReplacement.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/ifError.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/ifFalseReassign.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/ifSuperposition.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/ifSuperposition2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/ifSuperposition3.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/implicitDup.slq
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/implicitDupLifted.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds3.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds4.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds5.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds6.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds7.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds8.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds9.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexReplaceIfFunctionCall.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/innerProduct.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/innerProduct2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/intUintBoolConversion.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/integerPhase.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/invQ.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/invalidConstAnnotationError.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/invalidReturnTypeInference.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/ite.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/ite2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/ite3.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/ite4.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/lambdaEq.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/lengthMismatch.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/liftedAssign.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/liftedConstArg.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/localVariableInFunctionReturnTypeError.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/majorityOracle.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/makeWPower2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/map1.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/map2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/matchCoerce.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/measureArray.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/measureHadamard.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/measureReversePhase.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/measureUint.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/measureVector.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/mfreeImplicitForget.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/mixed.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/mixed2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/mixed3.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/mixed4.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/mixed5.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/multiForget.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/multiIndex1.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/multiIndex2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/multiIndex3.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/multiReplace.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/multiResultIndexReplace.slq
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/mustConsumeNonLifted.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/nestedClosure.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/nestedGlobal.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/nestedMeasure.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/nestedTupleMatch.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/newForLoopRangeSyntax.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/noImplicitForget.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/opAssignReverse.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/paramNotConsumedError.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/parameterizedSimulation.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/parseArrayOfVectorReturn.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/parseError.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/parseError2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/partialEval.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/partialEval2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/partialEval4.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch10.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch11.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch12.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch3.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch4.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch5.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch6.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch7.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch8.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch9.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/phaseEstimation.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/phaseQ.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/piToRat.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/print.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/qft.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumBitNotMinus.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumControlClassicalAssignment.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumIfClassicalUpdate.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/quid-updates.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/rationalPhase.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reassignArrayLength.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reassignConst.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reassignDepVar.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reassignDependentTypeParameter.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursion.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveNested.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/renatoCommunicationGameV1.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/repeat.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/repeat100.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/repeatUntil.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndex.slq
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexMulti0.slq
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexMulti1.slq
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexMulti2.slq
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexMulti3.slq
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexMulti4.slq
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexMulti5.slq
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexMulti6.slq
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexMulti7.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/ret2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/retClosure.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/retPi.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reuseCapturedName.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseArithmetic.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseEarlyReturn.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseFlatten.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseH.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseH0.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseH2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseH3.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseH4.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseH5.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseId.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseId2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseId3.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseImplicitForget.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseLifted.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseMeasureNonClassical.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reversePair.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reversePhase.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseRotX.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseRotY.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseRotZ.slq
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseSquare1.slq
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseSquare2.slq
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseSquare3.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseSubtype.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseToW.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseX.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/shadowCaptured.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/shadowing.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/shor.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/sinQ.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/singletonVectorHadamard.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/specialReverseTypeChecking.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/splitArrayConst.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/subtyping.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/sumArray.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/sumIota.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapArray.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapArray2.slq
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapArray3.slq
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapArray4.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapClosures.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapDiffArrays.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapEmptyIf.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapInt.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapVarWithComponent.slq
+%%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapVarWithComponent2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/teleportation.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/test.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/test3.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/test3_2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/test3_3.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/test3_4.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/test3_5.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testBadTypeAnnotation.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testForget.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testGenericConvert1.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testGenericConvert2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testHadamard.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testLiftedClassical.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testParamSameName.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testQFT.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testQFT2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testQFT3.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testQFT4.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testQFT5.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testQFT6.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testQFTNorm.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testQFTPretty.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testQFTPretty2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testReverse.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testReverse2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testReverse3.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testReverse4.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testUnsafeCaptureConst1.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testUnsafeCaptureConst2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testUnsafeCaptureConst3.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testUnsafeCaptureConst4.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/thirds.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/transpose.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/tupleArray.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/tupleConversion.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeAlias.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeConstBlockCapture.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeError.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeError2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeFunCall.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeFunCallCoerce.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/uncomputeOnArrayAssignment.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/unicodeLoc.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/unrealizableError.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/vectorConv.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/vectorToArray.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/warning.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/while.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/while2.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/whileFunctionCall.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/wrapX.slq
 %%PORTEXAMPLES%%%%EXAMPLESDIR%%/xwing.slq