Handle arm64 undefied instructions on msr exceptions
When userspace tries to access a special register that it doesn't have
access to the kernel receives an exception. On most cores this exception
has been observed to be the undefined instruction exception, however on
the Apple M1 under a QEMU based hypervisor it can be the MSR exception.
Handle this second case by also running the undefined exception handler
on these exceptions.
Sponsored by: Innovate UK