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Index: head/lib/libc/Makefile
===================================================================
--- head/lib/libc/Makefile
+++ head/lib/libc/Makefile
@@ -83,6 +83,7 @@
.if ${LIBC_ARCH} != "aarch64" && \
${LIBC_ARCH} != "amd64" && \
${LIBC_ARCH} != "powerpc64" && \
+ ${LIBC_ARCH} != "riscv" && \
${LIBC_ARCH} != "sparc64" && \
${MACHINE_ARCH:Mmipsn32*} == "" && \
${MACHINE_ARCH:Mmips64*} == ""
@@ -101,7 +102,7 @@
.include "${LIBC_SRCTOP}/uuid/Makefile.inc"
.include "${LIBC_SRCTOP}/xdr/Makefile.inc"
.if (${LIBC_ARCH} == "arm" && ${MACHINE_ARCH} != "armv6hf") ||\
- ${LIBC_ARCH} == "mips"
+ ${LIBC_ARCH} == "mips" && ${LIBC_ARCH} == "riscv"
.include "${LIBC_SRCTOP}/softfloat/Makefile.inc"
.endif
.if ${MK_NIS} != "no"
Index: head/lib/libc/gen/tls.c
===================================================================
--- head/lib/libc/gen/tls.c
+++ head/lib/libc/gen/tls.c
@@ -64,15 +64,16 @@
#if defined(__amd64__)
#define TLS_TCB_ALIGN 16
-#elif defined(__powerpc__) || defined(__i386__) || defined(__arm__) || \
- defined(__sparc64__) || defined(__mips__) || defined(__aarch64__)
+#elif defined(__aarch64__) || defined(__arm__) || defined(__i386__) || \
+ defined(__mips__) || defined(__powerpc__) || defined(__riscv__) || \
+ defined(__sparc64__)
#define TLS_TCB_ALIGN sizeof(void *)
#else
#error TLS_TCB_ALIGN undefined for target architecture
#endif
-#if defined(__arm__) || defined(__mips__) || defined(__powerpc__) || \
- defined(__aarch64__)
+#if defined(__aarch64__) || defined(__arm__) || defined(__mips__) || \
+ defined(__powerpc__) || defined(__riscv__)
#define TLS_VARIANT_I
#endif
#if defined(__i386__) || defined(__amd64__) || defined(__sparc64__)
Index: head/lib/libc/riscv/Makefile.inc
===================================================================
--- head/lib/libc/riscv/Makefile.inc
+++ head/lib/libc/riscv/Makefile.inc
@@ -1 +1,9 @@
# $FreeBSD$
+#
+# Machine dependent definitions for the RISC-V architecture.
+#
+
+# Long double is quad precision
+GDTOASRCS+=strtorQ.c
+MDSRCS+=machdep_ldisQ.c
+SYM_MAPS+=${LIBC_SRCTOP}/riscv/Symbol.map
Index: head/lib/libc/riscv/SYS.h
===================================================================
--- head/lib/libc/riscv/SYS.h
+++ head/lib/libc/riscv/SYS.h
@@ -0,0 +1,68 @@
+/*-
+ * Copyright (c) 2014 Andrew Turner
+ * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
+ * All rights reserved.
+ *
+ * Portions of this software were developed by SRI International and the
+ * University of Cambridge Computer Laboratory under DARPA/AFRL contract
+ * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Portions of this software were developed by the University of Cambridge
+ * Computer Laboratory as part of the CTSRD Project, with support from the
+ * UK Higher Education Innovation Fund (HEIF).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#include <sys/syscall.h>
+#include <machine/asm.h>
+
+#define _SYSCALL(name) \
+ li t0, SYS_ ## name; \
+ ecall
+
+#define SYSCALL(name) \
+ENTRY(__sys_##name); \
+ WEAK_REFERENCE(__sys_##name, name); \
+ WEAK_REFERENCE(__sys_##name, _##name); \
+ _SYSCALL(name); \
+ ret; \
+END(__sys_##name)
+
+#define PSEUDO(name) \
+ENTRY(__sys_##name); \
+ WEAK_REFERENCE(__sys_##name, _##name); \
+ _SYSCALL(name); \
+ bnez t0, cerror; \
+ ret; \
+END(__sys_##name)
+
+#define RSYSCALL(name) \
+ENTRY(__sys_##name); \
+ WEAK_REFERENCE(__sys_##name, name); \
+ WEAK_REFERENCE(__sys_##name, _##name); \
+ _SYSCALL(name); \
+ bnez t0, cerror; \
+ ret; \
+END(__sys_##name)
Index: head/lib/libc/riscv/Symbol.map
===================================================================
--- head/lib/libc/riscv/Symbol.map
+++ head/lib/libc/riscv/Symbol.map
@@ -0,0 +1,42 @@
+/*
+ * $FreeBSD$
+ */
+
+/*
+ * This only needs to contain symbols that are not listed in
+ * symbol maps from other parts of libc (i.e., not found in
+ * stdlib/Symbol.map, string/Symbol.map, sys/Symbol.map, ...).
+ */
+FBSD_1.0 {
+ /* PSEUDO syscalls */
+ _exit;
+
+ _setjmp;
+ _longjmp;
+ fabs;
+ __flt_rounds;
+ fpgetmask;
+ fpsetmask;
+ __infinity;
+ __nan;
+ setjmp;
+ longjmp;
+ sigsetjmp;
+ siglongjmp;
+ htonl;
+ htons;
+ ntohl;
+ ntohs;
+ vfork;
+ brk;
+ sbrk;
+ makecontext;
+};
+
+FBSDprivate_1.0 {
+ _set_tp;
+ _end;
+ curbrk;
+ minbrk;
+ __makecontext;
+};
Index: head/lib/libc/riscv/_fpmath.h
===================================================================
--- head/lib/libc/riscv/_fpmath.h
+++ head/lib/libc/riscv/_fpmath.h
@@ -0,0 +1,71 @@
+/*-
+ * Copyright (c) 2002, 2003 David Schultz <das@FreeBSD.ORG>
+ * Copyright (c) 2014 The FreeBSD Foundation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+union IEEEl2bits {
+ long double e;
+ struct {
+ unsigned long manl :64;
+ unsigned long manh :48;
+ unsigned int exp :15;
+ unsigned int sign :1;
+ } bits;
+ struct {
+ unsigned long manl :64;
+ unsigned long manh :48;
+ unsigned int expsign :16;
+ } xbits;
+};
+
+#define LDBL_NBIT 0
+#define LDBL_IMPLICIT_NBIT
+#define mask_nbit_l(u) ((void)0)
+
+#define LDBL_MANH_SIZE 20
+#define LDBL_MANL_SIZE 32
+
+#define LDBL_TO_ARRAY32(u, a) do { \
+ (a)[0] = (uint32_t)(u).bits.manl; \
+ (a)[1] = (uint32_t)(u).bits.manh; \
+} while(0)
+
+/*
+ * TODO: Due to compiler problem we are temporary using
+ * LDBL_PREC == 53. Use code below for LDBL_PREC == 113
+ */
+#if 0
+#define LDBL_MANH_SIZE 48
+#define LDBL_MANL_SIZE 64
+
+#define LDBL_TO_ARRAY32(u, a) do { \
+ (a)[0] = (uint32_t)(u).bits.manl; \
+ (a)[1] = (uint32_t)((u).bits.manl >> 32); \
+ (a)[2] = (uint32_t)(u).bits.manh; \
+ (a)[3] = (uint32_t)((u).bits.manh >> 32); \
+} while(0)
+#endif
Index: head/lib/libc/riscv/arith.h
===================================================================
--- head/lib/libc/riscv/arith.h
+++ head/lib/libc/riscv/arith.h
@@ -0,0 +1,19 @@
+/*
+ * MD header for contrib/gdtoa
+ *
+ * $FreeBSD$
+ */
+
+/*
+ * NOTE: The definitions in this file must be correct or strtod(3) and
+ * floating point formats in printf(3) will break! The file can be
+ * generated by running contrib/gdtoa/arithchk.c on the target
+ * architecture. See contrib/gdtoa/gdtoaimp.h for details.
+ */
+
+#define IEEE_8087
+#define Arith_Kind_ASL 1
+#define Long int
+#define Intcast (int)(long)
+#define Double_Align
+#define X64_bit_pointers
Index: head/lib/libc/riscv/gd_qnan.h
===================================================================
--- head/lib/libc/riscv/gd_qnan.h
+++ head/lib/libc/riscv/gd_qnan.h
@@ -0,0 +1,21 @@
+/*
+ * MD header for contrib/gdtoa
+ *
+ * This file can be generated by compiling and running contrib/gdtoa/qnan.c
+ * on the target architecture after arith.h has been generated.
+ *
+ * $FreeBSD$
+ */
+
+#define f_QNAN 0x7fc00000
+#define d_QNAN0 0x0
+#define d_QNAN1 0x7ff80000
+#define ld_QNAN0 0x0
+#define ld_QNAN1 0x7ff80000
+#define ld_QNAN2 0x0
+#define ld_QNAN3 0x0
+#define ldus_QNAN0 0x0
+#define ldus_QNAN1 0x0
+#define ldus_QNAN2 0x0
+#define ldus_QNAN3 0x7ff8
+#define ldus_QNAN4 0x0
Index: head/lib/libc/riscv/gen/Makefile.inc
===================================================================
--- head/lib/libc/riscv/gen/Makefile.inc
+++ head/lib/libc/riscv/gen/Makefile.inc
@@ -0,0 +1,13 @@
+# $FreeBSD$
+
+SRCS+= _ctx_start.S \
+ fabs.S \
+ flt_rounds.c \
+ infinity.c \
+ ldexp.c \
+ makecontext.c \
+ _setjmp.S \
+ _set_tp.c \
+ setjmp.S \
+ sigsetjmp.S \
+ trivial-getcontextx.c
Index: head/lib/libc/riscv/gen/_ctx_start.S
===================================================================
--- head/lib/libc/riscv/gen/_ctx_start.S
+++ head/lib/libc/riscv/gen/_ctx_start.S
@@ -0,0 +1,43 @@
+/*-
+ * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
+ * All rights reserved.
+ *
+ * Portions of this software were developed by SRI International and the
+ * University of Cambridge Computer Laboratory under DARPA/AFRL contract
+ * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Portions of this software were developed by the University of Cambridge
+ * Computer Laboratory as part of the CTSRD Project, with support from the
+ * UK Higher Education Innovation Fund (HEIF).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+ENTRY(_ctx_start)
+ jalr s0 /* Call func from makecontext */
+ mv a0, s1 /* Load ucp saved in makecontext */
+ call _C_LABEL(ctx_done)
+ call _C_LABEL(abort)
+END(_ctx_start)
Index: head/lib/libc/riscv/gen/_set_tp.c
===================================================================
--- head/lib/libc/riscv/gen/_set_tp.c
+++ head/lib/libc/riscv/gen/_set_tp.c
@@ -0,0 +1,50 @@
+/*-
+ * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
+ * All rights reserved.
+ *
+ * Portions of this software were developed by SRI International and the
+ * University of Cambridge Computer Laboratory under DARPA/AFRL contract
+ * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Portions of this software were developed by the University of Cambridge
+ * Computer Laboratory as part of the CTSRD Project, with support from the
+ * UK Higher Education Innovation Fund (HEIF).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <string.h>
+#include <sys/types.h>
+
+#include <machine/sysarch.h>
+
+#include <stdlib.h>
+
+void
+_set_tp(void *tp)
+{
+
+ __asm __volatile("mv tp, %0" :: "r"((char*)tp + 0x10));
+}
Index: head/lib/libc/riscv/gen/_setjmp.S
===================================================================
--- head/lib/libc/riscv/gen/_setjmp.S
+++ head/lib/libc/riscv/gen/_setjmp.S
@@ -0,0 +1,151 @@
+/*-
+ * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
+ * All rights reserved.
+ *
+ * Portions of this software were developed by SRI International and the
+ * University of Cambridge Computer Laboratory under DARPA/AFRL contract
+ * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Portions of this software were developed by the University of Cambridge
+ * Computer Laboratory as part of the CTSRD Project, with support from the
+ * UK Higher Education Innovation Fund (HEIF).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+#include <machine/setjmp.h>
+
+ENTRY(_setjmp)
+ /* Store the magic value and stack pointer */
+ la t0, .Lmagic
+ ld t0, 0(t0)
+ sd t0, (0 * 8)(a0)
+ sd sp, (1 * 8)(a0)
+ addi a0, a0, (2 * 8)
+
+ /* Store the general purpose registers and ra */
+ sd s0, (0 * 8)(a0)
+ sd s1, (1 * 8)(a0)
+ sd s2, (2 * 8)(a0)
+ sd s3, (3 * 8)(a0)
+ sd s4, (4 * 8)(a0)
+ sd s5, (5 * 8)(a0)
+ sd s6, (6 * 8)(a0)
+ sd s7, (7 * 8)(a0)
+ sd s8, (8 * 8)(a0)
+ sd s9, (9 * 8)(a0)
+ sd s10, (10 * 8)(a0)
+ sd s11, (11 * 8)(a0)
+ sd ra, (12 * 8)(a0)
+ addi a0, a0, (13 * 8)
+
+#ifndef _STANDALONE
+#if 0
+ /* RISCVTODO */
+ /* Store the vfp registers */
+ fsq fs0, (0 * 16)(a0)
+ fsq fs1, (1 * 16)(a0)
+ fsq fs2, (2 * 16)(a0)
+ fsq fs3, (3 * 16)(a0)
+ fsq fs4, (4 * 16)(a0)
+ fsq fs5, (5 * 16)(a0)
+ fsq fs6, (6 * 16)(a0)
+ fsq fs7, (7 * 16)(a0)
+ fsq fs8, (8 * 16)(a0)
+ fsq fs9, (9 * 16)(a0)
+ fsq fs10, (10 * 16)(a0)
+ fsq fs11, (11 * 16)(a0)
+ addi a0, a0, (12 * 16)
+#endif
+#endif
+
+ /* Return value */
+ li a0, 0
+ ret
+ .align 3
+.Lmagic:
+ .quad _JB_MAGIC__SETJMP
+END(_setjmp)
+
+ENTRY(_longjmp)
+ /* Check the magic value */
+ ld t0, 0(a0)
+ la t1, .Lmagic
+ ld t1, 0(t1)
+ bne t0, t1, botch
+
+ /* Restore the stack pointer */
+ ld t0, 8(a0)
+ mv sp, t0
+ addi a0, a0, (2 * 8)
+
+ /* Restore the general purpose registers and ra */
+ ld s0, (0 * 8)(a0)
+ ld s1, (1 * 8)(a0)
+ ld s2, (2 * 8)(a0)
+ ld s3, (3 * 8)(a0)
+ ld s4, (4 * 8)(a0)
+ ld s5, (5 * 8)(a0)
+ ld s6, (6 * 8)(a0)
+ ld s7, (7 * 8)(a0)
+ ld s8, (8 * 8)(a0)
+ ld s9, (9 * 8)(a0)
+ ld s10, (10 * 8)(a0)
+ ld s11, (11 * 8)(a0)
+ ld ra, (12 * 8)(a0)
+ addi a0, a0, (13 * 8)
+
+#ifndef _STANDALONE
+#if 0
+ /* RISCVTODO */
+ /* Restore the vfp registers */
+ flq fs0, (0 * 16)(a0)
+ flq fs1, (1 * 16)(a0)
+ flq fs2, (2 * 16)(a0)
+ flq fs3, (3 * 16)(a0)
+ flq fs4, (4 * 16)(a0)
+ flq fs5, (5 * 16)(a0)
+ flq fs6, (6 * 16)(a0)
+ flq fs7, (7 * 16)(a0)
+ flq fs8, (8 * 16)(a0)
+ flq fs9, (9 * 16)(a0)
+ flq fs10, (10 * 16)(a0)
+ flq fs11, (11 * 16)(a0)
+ addi a0, a0, (12 * 16)
+#endif
+#endif
+
+ /* Load the return value */
+ mv a0, a1
+ ret
+
+botch:
+#ifdef _STANDALONE
+ j botch
+#else
+ call _C_LABEL(longjmperror)
+ call _C_LABEL(abort)
+#endif
+END(_longjmp)
Index: head/lib/libc/riscv/gen/fabs.S
===================================================================
--- head/lib/libc/riscv/gen/fabs.S
+++ head/lib/libc/riscv/gen/fabs.S
@@ -0,0 +1,41 @@
+/*-
+ * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
+ * All rights reserved.
+ *
+ * Portions of this software were developed by SRI International and the
+ * University of Cambridge Computer Laboratory under DARPA/AFRL contract
+ * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Portions of this software were developed by the University of Cambridge
+ * Computer Laboratory as part of the CTSRD Project, with support from the
+ * UK Higher Education Innovation Fund (HEIF).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+ENTRY(fabs)
+ fabs.d fa0, fa0
+ ret
+END(fabs)
Index: head/lib/libc/riscv/gen/flt_rounds.c
===================================================================
--- head/lib/libc/riscv/gen/flt_rounds.c
+++ head/lib/libc/riscv/gen/flt_rounds.c
@@ -0,0 +1,71 @@
+/*-
+ * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
+ * All rights reserved.
+ *
+ * Portions of this software were developed by SRI International and the
+ * University of Cambridge Computer Laboratory under DARPA/AFRL contract
+ * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Portions of this software were developed by the University of Cambridge
+ * Computer Laboratory as part of the CTSRD Project, with support from the
+ * UK Higher Education Innovation Fund (HEIF).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/types.h>
+
+#include <fenv.h>
+#include <float.h>
+
+int
+__flt_rounds(void)
+{
+#if 0
+ uint64_t fcsr;
+#endif
+ int mode;
+
+#if 0
+ __asm __volatile("csrr %0, fcsr" : "=r" (fcsr));
+ mode = (fcsr & _ROUND_MASK);
+#endif
+
+ /* RISCVTODO */
+ mode = FE_TOWARDZERO; /* softfloat rounding mode */
+
+ switch (mode) {
+ case FE_TOWARDZERO:
+ return (0);
+ case FE_TONEAREST:
+ return (1);
+ case FE_UPWARD:
+ return (2);
+ case FE_DOWNWARD:
+ return (3);
+ }
+
+ return (-1);
+}
Index: head/lib/libc/riscv/gen/infinity.c
===================================================================
--- head/lib/libc/riscv/gen/infinity.c
+++ head/lib/libc/riscv/gen/infinity.c
@@ -0,0 +1,14 @@
+/*
+ * infinity.c
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <math.h>
+
+/* bytes for +Infinity on riscv */
+const union __infinity_un __infinity = { { 0, 0, 0, 0, 0, 0, 0xf0, 0x7f } };
+
+/* bytes for NaN */
+const union __nan_un __nan = { { 0, 0, 0xc0, 0xff } };
Index: head/lib/libc/riscv/gen/makecontext.c
===================================================================
--- head/lib/libc/riscv/gen/makecontext.c
+++ head/lib/libc/riscv/gen/makecontext.c
@@ -0,0 +1,91 @@
+/*-
+ * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
+ * All rights reserved.
+ *
+ * Portions of this software were developed by SRI International and the
+ * University of Cambridge Computer Laboratory under DARPA/AFRL contract
+ * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Portions of this software were developed by the University of Cambridge
+ * Computer Laboratory as part of the CTSRD Project, with support from the
+ * UK Higher Education Innovation Fund (HEIF).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+
+#include <machine/riscvreg.h>
+
+#include <inttypes.h>
+#include <stdarg.h>
+#include <stdlib.h>
+#include <ucontext.h>
+
+void _ctx_start(void);
+
+void
+ctx_done(ucontext_t *ucp)
+{
+
+ if (ucp->uc_link == NULL) {
+ exit(0);
+ } else {
+ setcontext((const ucontext_t *)ucp->uc_link);
+ abort();
+ }
+}
+
+__weak_reference(__makecontext, makecontext);
+
+void
+__makecontext(ucontext_t *ucp, void (*func)(void), int argc, ...)
+{
+ struct gpregs *gp;
+ va_list ap;
+ int i;
+
+ /* A valid context is required. */
+ if (ucp == NULL)
+ return;
+
+ if ((argc < 0) || (argc > 8))
+ return;
+
+ gp = &ucp->uc_mcontext.mc_gpregs;
+
+ va_start(ap, argc);
+ /* Pass up to eight arguments in a0-7. */
+ for (i = 0; i < argc && i < 8; i++)
+ gp->gp_a[i] = va_arg(ap, uint64_t);
+ va_end(ap);
+
+ /* Set the stack */
+ gp->gp_sp = STACKALIGN(ucp->uc_stack.ss_sp + ucp->uc_stack.ss_size);
+ /* Arrange for return via the trampoline code. */
+ gp->gp_sepc = (__register_t)_ctx_start;
+ gp->gp_s[0] = (__register_t)func;
+ gp->gp_s[1] = (__register_t)ucp;
+}
Index: head/lib/libc/riscv/gen/setjmp.S
===================================================================
--- head/lib/libc/riscv/gen/setjmp.S
+++ head/lib/libc/riscv/gen/setjmp.S
@@ -0,0 +1,173 @@
+/*-
+ * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
+ * All rights reserved.
+ *
+ * Portions of this software were developed by SRI International and the
+ * University of Cambridge Computer Laboratory under DARPA/AFRL contract
+ * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Portions of this software were developed by the University of Cambridge
+ * Computer Laboratory as part of the CTSRD Project, with support from the
+ * UK Higher Education Innovation Fund (HEIF).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+#include <machine/setjmp.h>
+
+ENTRY(setjmp)
+ addi sp, sp, -(2 * 8)
+ sd a0, 0(sp)
+ sd ra, 8(sp)
+
+ /* Store the signal mask */
+ addi a2, a0, (_JB_SIGMASK * 8) /* oset */
+ li a1, 0 /* set */
+ li a0, 1 /* SIG_BLOCK */
+ jal sigprocmask
+
+ ld a0, 0(sp)
+ ld ra, 8(sp)
+ addi sp, sp, (2 * 8)
+
+ /* Store the magic value and stack pointer */
+ la t0, .Lmagic
+ ld t0, 0(t0)
+ sd t0, (0 * 8)(a0)
+ sd sp, (1 * 8)(a0)
+ addi a0, a0, (2 * 8)
+
+ /* Store the general purpose registers and ra */
+ sd s0, (0 * 8)(a0)
+ sd s1, (1 * 8)(a0)
+ sd s2, (2 * 8)(a0)
+ sd s3, (3 * 8)(a0)
+ sd s4, (4 * 8)(a0)
+ sd s5, (5 * 8)(a0)
+ sd s6, (6 * 8)(a0)
+ sd s7, (7 * 8)(a0)
+ sd s8, (8 * 8)(a0)
+ sd s9, (9 * 8)(a0)
+ sd s10, (10 * 8)(a0)
+ sd s11, (11 * 8)(a0)
+ sd ra, (12 * 8)(a0)
+ addi a0, a0, (13 * 8)
+
+#if 0
+ /* RISCVTODO */
+ /* Store the vfp registers */
+ fsq fs0, (0 * 16)(a0)
+ fsq fs1, (1 * 16)(a0)
+ fsq fs2, (2 * 16)(a0)
+ fsq fs3, (3 * 16)(a0)
+ fsq fs4, (4 * 16)(a0)
+ fsq fs5, (5 * 16)(a0)
+ fsq fs6, (6 * 16)(a0)
+ fsq fs7, (7 * 16)(a0)
+ fsq fs8, (8 * 16)(a0)
+ fsq fs9, (9 * 16)(a0)
+ fsq fs10, (10 * 16)(a0)
+ fsq fs11, (11 * 16)(a0)
+ addi a0, a0, (12 * 16)
+#endif
+
+ /* Return value */
+ li a0, 0
+ ret
+ .align 3
+.Lmagic:
+ .quad _JB_MAGIC_SETJMP
+END(setjmp)
+
+ENTRY(longjmp)
+ addi sp, sp, -(4 * 8)
+ sd a0, (0 * 8)(sp)
+ sd ra, (1 * 8)(sp)
+ sd a1, (2 * 8)(sp)
+
+ /* Restore the signal mask */
+ li a2, 0 /* oset */
+ addi a1, a0, (_JB_SIGMASK * 8) /* set */
+ li a0, 3 /* SIG_BLOCK */
+ jal sigprocmask
+
+ ld a1, (2 * 8)(sp)
+ ld ra, (1 * 8)(sp)
+ ld a0, (0 * 8)(sp)
+ addi sp, sp, (4 * 8)
+
+ /* Check the magic value */
+ ld t0, 0(a0)
+ la t1, .Lmagic
+ ld t1, 0(t1)
+ bne t0, t1, botch
+
+ /* Restore the stack pointer */
+ ld t0, 8(a0)
+ mv sp, t0
+ addi a0, a0, (2 * 8)
+
+ /* Restore the general purpose registers and ra */
+ ld s0, (0 * 8)(a0)
+ ld s1, (1 * 8)(a0)
+ ld s2, (2 * 8)(a0)
+ ld s3, (3 * 8)(a0)
+ ld s4, (4 * 8)(a0)
+ ld s5, (5 * 8)(a0)
+ ld s6, (6 * 8)(a0)
+ ld s7, (7 * 8)(a0)
+ ld s8, (8 * 8)(a0)
+ ld s9, (9 * 8)(a0)
+ ld s10, (10 * 8)(a0)
+ ld s11, (11 * 8)(a0)
+ ld ra, (12 * 8)(a0)
+ addi a0, a0, (13 * 8)
+
+#if 0
+ /* RISCVTODO */
+ /* Restore the vfp registers */
+ flq fs0, (0 * 16)(a0)
+ flq fs1, (1 * 16)(a0)
+ flq fs2, (2 * 16)(a0)
+ flq fs3, (3 * 16)(a0)
+ flq fs4, (4 * 16)(a0)
+ flq fs5, (5 * 16)(a0)
+ flq fs6, (6 * 16)(a0)
+ flq fs7, (7 * 16)(a0)
+ flq fs8, (8 * 16)(a0)
+ flq fs9, (9 * 16)(a0)
+ flq fs10, (10 * 16)(a0)
+ flq fs11, (11 * 16)(a0)
+ addi a0, a0, (12 * 16)
+#endif
+
+ /* Load the return value */
+ mv a0, a1
+ ret
+
+botch:
+ call _C_LABEL(longjmperror)
+ call _C_LABEL(abort)
+END(longjmp)
Index: head/lib/libc/riscv/gen/sigsetjmp.S
===================================================================
--- head/lib/libc/riscv/gen/sigsetjmp.S
+++ head/lib/libc/riscv/gen/sigsetjmp.S
@@ -0,0 +1,57 @@
+/*-
+ * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
+ * All rights reserved.
+ *
+ * Portions of this software were developed by SRI International and the
+ * University of Cambridge Computer Laboratory under DARPA/AFRL contract
+ * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Portions of this software were developed by the University of Cambridge
+ * Computer Laboratory as part of the CTSRD Project, with support from the
+ * UK Higher Education Innovation Fund (HEIF).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+#include <machine/setjmp.h>
+
+ENTRY(sigsetjmp)
+ beqz a1, _C_LABEL(_setjmp)
+ j _C_LABEL(setjmp)
+END(sigsetjmp)
+
+ENTRY(siglongjmp)
+ /* Load the _setjmp magic */
+ ld a2, .Lmagic
+ ld a3, 0(a0)
+
+ /* Check the magic */
+ beq a2, a3, _C_LABEL(_longjmp)
+ j _C_LABEL(longjmp)
+
+ .align 3
+.Lmagic:
+ .quad _JB_MAGIC__SETJMP
+END(siglongjmp)
Index: head/lib/libc/riscv/sys/Makefile.inc
===================================================================
--- head/lib/libc/riscv/sys/Makefile.inc
+++ head/lib/libc/riscv/sys/Makefile.inc
@@ -0,0 +1,25 @@
+# $FreeBSD$
+
+SRCS+= trivial-vdso_tc.c
+
+#MDASM= ptrace.S
+MDASM= brk.S \
+ cerror.S \
+ pipe.S \
+ sbrk.S \
+ shmat.S \
+ sigreturn.S \
+ syscall.S \
+ vfork.S
+
+# Don't generate default code for these syscalls:
+NOASM= break.o \
+ exit.o \
+ getlogin.o \
+ openbsd_poll.o \
+ sstk.o \
+ vfork.o \
+ yield.o
+
+PSEUDO= _exit.o \
+ _getlogin.o
Index: head/lib/libc/riscv/sys/brk.S
===================================================================
--- head/lib/libc/riscv/sys/brk.S
+++ head/lib/libc/riscv/sys/brk.S
@@ -0,0 +1,79 @@
+/*-
+ * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
+ * All rights reserved.
+ *
+ * Portions of this software were developed by SRI International and the
+ * University of Cambridge Computer Laboratory under DARPA/AFRL contract
+ * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Portions of this software were developed by the University of Cambridge
+ * Computer Laboratory as part of the CTSRD Project, with support from the
+ * UK Higher Education Innovation Fund (HEIF).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+#include "SYS.h"
+
+ .globl _C_LABEL(_end)
+
+ .data
+ .align 3
+ .globl _C_LABEL(minbrk)
+ .type _C_LABEL(minbrk), %object
+_C_LABEL(minbrk):
+ .quad _C_LABEL(_end)
+
+ .text
+/*
+ * int brk(const void *addr);
+ */
+ENTRY(_brk)
+ WEAK_REFERENCE(_brk, brk)
+
+ /* Load the address of minbrk */
+ la a3, minbrk
+ ld a2, 0(a3)
+
+ /* Validate the address */
+ bge a0, a2, 1f
+ /* Invalid, set it to the minimum */
+ mv a0, a2
+
+ /* Backup the new address */
+1: mv a4, a0
+
+ /* Update for this value, will overwrite a0 and a1 */
+ _SYSCALL(break)
+ bnez t0, cerror
+
+ /* Store the new curbrk value */
+ la a2, curbrk
+ sd a4, 0(a2)
+
+ /* Return success */
+ li a0, 0
+ ret
+END(_brk)
Index: head/lib/libc/riscv/sys/cerror.S
===================================================================
--- head/lib/libc/riscv/sys/cerror.S
+++ head/lib/libc/riscv/sys/cerror.S
@@ -0,0 +1,50 @@
+/*-
+ * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
+ * All rights reserved.
+ *
+ * Portions of this software were developed by SRI International and the
+ * University of Cambridge Computer Laboratory under DARPA/AFRL contract
+ * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Portions of this software were developed by the University of Cambridge
+ * Computer Laboratory as part of the CTSRD Project, with support from the
+ * UK Higher Education Innovation Fund (HEIF).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+ENTRY(cerror)
+ addi sp, sp, -16
+ sd a0, 0(sp)
+ sd ra, 8(sp)
+ call _C_LABEL(__error)
+ ld a1, 0(sp)
+ ld ra, 8(sp)
+ sw a1, 0(a0)
+ li a0, -1
+ li a1, -1
+ addi sp, sp, 16
+ ret
+END(cerror)
Index: head/lib/libc/riscv/sys/pipe.S
===================================================================
--- head/lib/libc/riscv/sys/pipe.S
+++ head/lib/libc/riscv/sys/pipe.S
@@ -0,0 +1,57 @@
+/*-
+ * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
+ * All rights reserved.
+ *
+ * Portions of this software were developed by SRI International and the
+ * University of Cambridge Computer Laboratory under DARPA/AFRL contract
+ * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Portions of this software were developed by the University of Cambridge
+ * Computer Laboratory as part of the CTSRD Project, with support from the
+ * UK Higher Education Innovation Fund (HEIF).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+#include "SYS.h"
+
+ENTRY(__sys_pipe)
+ WEAK_REFERENCE(__sys_pipe, pipe)
+
+ /* Backup the pointer passed to us */
+ mv a2, a0
+
+ /* Make the syscall */
+ _SYSCALL(pipe)
+ bnez t0, cerror
+
+ /* Store the result */
+ sw a0, 0(a2)
+ sw a1, 4(a2)
+
+ /* Return */
+ li a0, 0
+ ret
+END(__sys_pipe)
Index: head/lib/libc/riscv/sys/sbrk.S
===================================================================
--- head/lib/libc/riscv/sys/sbrk.S
+++ head/lib/libc/riscv/sys/sbrk.S
@@ -0,0 +1,77 @@
+/*-
+ * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
+ * All rights reserved.
+ *
+ * Portions of this software were developed by SRI International and the
+ * University of Cambridge Computer Laboratory under DARPA/AFRL contract
+ * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Portions of this software were developed by the University of Cambridge
+ * Computer Laboratory as part of the CTSRD Project, with support from the
+ * UK Higher Education Innovation Fund (HEIF).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+#include "SYS.h"
+
+ .globl _C_LABEL(_end)
+
+ .data
+ .align 3
+ .global _C_LABEL(curbrk)
+ .type _C_LABEL(curbrk), %object
+_C_LABEL(curbrk):
+ .quad _C_LABEL(_end)
+
+ .text
+/*
+ * void *sbrk(intptr_t incr);
+ */
+ENTRY(_sbrk)
+ WEAK_REFERENCE(_sbrk, sbrk)
+
+ /* Load the address of curbrk */
+ la a3, curbrk
+
+ /* Get the current brk address */
+ ld a2, 0(a3)
+
+ /* Calculate the new value */
+ add a0, a0, a2
+ mv a4, a0
+
+ /* Update for this value, will overwrite a0 and a1 */
+ _SYSCALL(break)
+ bnez t0, cerror
+
+ /* Load the old value to return */
+ ld a0, 0(a3)
+
+ /* Store the new curbrk value */
+ sd a4, 0(a3)
+
+ ret
+END(_sbrk)
Index: head/lib/libc/riscv/sys/shmat.S
===================================================================
--- head/lib/libc/riscv/sys/shmat.S
+++ head/lib/libc/riscv/sys/shmat.S
@@ -0,0 +1,40 @@
+/*-
+ * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
+ * All rights reserved.
+ *
+ * Portions of this software were developed by SRI International and the
+ * University of Cambridge Computer Laboratory under DARPA/AFRL contract
+ * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Portions of this software were developed by the University of Cambridge
+ * Computer Laboratory as part of the CTSRD Project, with support from the
+ * UK Higher Education Innovation Fund (HEIF).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+#include "SYS.h"
+
+RSYSCALL(shmat)
Index: head/lib/libc/riscv/sys/sigreturn.S
===================================================================
--- head/lib/libc/riscv/sys/sigreturn.S
+++ head/lib/libc/riscv/sys/sigreturn.S
@@ -0,0 +1,40 @@
+/*-
+ * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
+ * All rights reserved.
+ *
+ * Portions of this software were developed by SRI International and the
+ * University of Cambridge Computer Laboratory under DARPA/AFRL contract
+ * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Portions of this software were developed by the University of Cambridge
+ * Computer Laboratory as part of the CTSRD Project, with support from the
+ * UK Higher Education Innovation Fund (HEIF).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+#include "SYS.h"
+
+RSYSCALL(sigreturn)
Index: head/lib/libc/riscv/sys/syscall.S
===================================================================
--- head/lib/libc/riscv/sys/syscall.S
+++ head/lib/libc/riscv/sys/syscall.S
@@ -0,0 +1,40 @@
+/*-
+ * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
+ * All rights reserved.
+ *
+ * Portions of this software were developed by SRI International and the
+ * University of Cambridge Computer Laboratory under DARPA/AFRL contract
+ * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Portions of this software were developed by the University of Cambridge
+ * Computer Laboratory as part of the CTSRD Project, with support from the
+ * UK Higher Education Innovation Fund (HEIF).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+#include "SYS.h"
+
+RSYSCALL(syscall)
Index: head/lib/libc/riscv/sys/vfork.S
===================================================================
--- head/lib/libc/riscv/sys/vfork.S
+++ head/lib/libc/riscv/sys/vfork.S
@@ -0,0 +1,51 @@
+/*-
+ * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
+ * All rights reserved.
+ *
+ * Portions of this software were developed by SRI International and the
+ * University of Cambridge Computer Laboratory under DARPA/AFRL contract
+ * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Portions of this software were developed by the University of Cambridge
+ * Computer Laboratory as part of the CTSRD Project, with support from the
+ * UK Higher Education Innovation Fund (HEIF).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+#include "SYS.h"
+
+ENTRY(__sys_vfork)
+ WEAK_REFERENCE(__sys_vfork, vfork)
+ WEAK_REFERENCE(__sys_vfork, _vfork)
+ mv a2, ra
+
+ _SYSCALL(vfork)
+ bnez t0, cerror
+ addi a1, a1, -1
+ and a0, a0, a1
+ mv ra, a2
+
+ ret
+END(__sys_vfork)
Index: head/lib/libc/xdr/xdr_float.c
===================================================================
--- head/lib/libc/xdr/xdr_float.c
+++ head/lib/libc/xdr/xdr_float.c
@@ -61,14 +61,8 @@
* This routine works on machines with IEEE754 FP and Vaxen.
*/
-#if defined(__m68k__) || defined(__sparc__) || defined(__i386__) || \
- defined(__mips__) || defined(__ns32k__) || defined(__alpha__) || \
- defined(__arm__) || defined(__ppc__) || \
- defined(__arm26__) || defined(__sparc64__) || defined(__amd64__) || \
- defined(__aarch64__)
#include <machine/endian.h>
#define IEEEFP
-#endif
#if defined(__vax__)
Index: head/lib/libstand/Makefile
===================================================================
--- head/lib/libstand/Makefile
+++ head/lib/libstand/Makefile
@@ -65,8 +65,8 @@
SRCS+= aeabi_memcmp.S aeabi_memcpy.S aeabi_memmove.S aeabi_memset.S
.endif
-.if ${MACHINE_CPUARCH} == "aarch64"
-.PATH: ${LIBC_SRC}/aarch64/gen
+.if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "riscv"
+.PATH: ${LIBC_SRC}/${MACHINE_CPUARCH}/gen
.endif
.if ${MACHINE_CPUARCH} == "powerpc"

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