Index: sys/arm/arm/cpuinfo.c
===================================================================
--- sys/arm/arm/cpuinfo.c
+++ sys/arm/arm/cpuinfo.c
@@ -195,10 +195,11 @@
 			/*
 			 * Disable exclusive L1/L2 cache control
 			 * Enable SMP mode
+			 * Enable L1 prefetch
 			 * Enable Cache and TLB maintenance broadcast
 			 */
-			*actlr_mask = (1 << 7) | (1 << 6) | (1 << 0);
-			*actlr_set = (1 << 6) | (1 << 0);
+			*actlr_mask = (1 << 7) | (1 << 6) | (1 << 2) | (1 << 0);
+			*actlr_set = (1 << 6) | (1 << 2) | (1 << 0);
 			break;
 		case CPU_ARCH_CORTEX_A8:
 			/*