Index: sys/x86/x86/x86_mem.c
===================================================================
--- sys/x86/x86/x86_mem.c
+++ sys/x86/x86/x86_mem.c
@@ -303,19 +303,13 @@
  * Update running CPU(s) MTRRs to match the ranges in the descriptor
  * list.
  *
- * XXX Must be called with interrupts enabled.
+ * Must be called with interrupts enabled.
  */
 static void
 x86_mrstore(struct mem_range_softc *sc)
 {
 
-#ifdef SMP
 	smp_rendezvous(NULL, x86_mrstoreone, NULL, sc);
-#else
-	disable_intr();				/* disable interrupts */
-	x86_mrstoreone(sc);
-	enable_intr();
-#endif
 }
 
 /*
@@ -710,19 +704,13 @@
  * Re-initialise running CPU(s) MTRRs to match the ranges in the descriptor
  * list.
  *
- * XXX Must be called with interrupts enabled.
+ * Must be called with interrupts enabled.
  */
 static void
 x86_mrreinit(struct mem_range_softc *sc)
 {
 
-#ifdef SMP
-	smp_rendezvous(NULL, (void *)x86_mrAPinit, NULL, sc);
-#else
-	disable_intr();				/* disable interrupts */
-	x86_mrAPinit(sc);
-	enable_intr();
-#endif
+	smp_rendezvous(NULL, (void (*)(void *))x86_mrAPinit, NULL, sc);
 }
 
 static void
@@ -733,16 +721,6 @@
 		return;
 	if (!(cpu_feature & CPUID_MTRR))
 		return;
-	if ((cpu_id & 0xf00) != 0x600 && (cpu_id & 0xf00) != 0xf00)
-		return;
-	switch (cpu_vendor_id) {
-	case CPU_VENDOR_INTEL:
-	case CPU_VENDOR_AMD:
-	case CPU_VENDOR_CENTAUR:
-		break;
-	default:
-		return;
-	}
 	mem_range_softc.mr_op = &x86_mrops;
 	x86_mrinit(&mem_range_softc);
 }