Index: Makefile.inc1 =================================================================== --- Makefile.inc1 +++ Makefile.inc1 @@ -603,7 +603,8 @@ .endif .if ${MK_LIB32} != "no" && (${TARGET_ARCH} == "amd64" || \ - ${TARGET_ARCH} == "powerpc64") || ${TARGET_ARCH:Mmips64*} != "" + ${TARGET_ARCH} == "powerpc64") || \ + (${COMPILER_TYPE} == "gcc" && ${TARGET_ARCH:Mmips64*} != "") LIBCOMPAT= 32 .include "Makefile.libcompat" .elif ${MK_LIBSOFT} != "no" && ${TARGET_ARCH} == "armv6" Index: contrib/binutils/bfd/elf64-mips.c =================================================================== --- contrib/binutils/bfd/elf64-mips.c +++ contrib/binutils/bfd/elf64-mips.c @@ -1673,6 +1673,24 @@ 0, /* src_mask */ 0x0000ffff, /* dst_mask */ TRUE); /* pcrel_offset */ + +/* 32 bit pc-relative. This was a GNU extension used by embedded-PIC. + It was co-opted by mips-linux for exception-handling data. */ +/* XXXBD: blind cut and paste from elf32-mips.c */ +static reloc_howto_type elf_mips_gnu_pcrel32 = + HOWTO (R_MIPS_PC32, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 32, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + _bfd_mips_elf_generic_reloc, /* special_function */ + "R_MIPS_PC32", /* name */ + TRUE, /* partial_inplace */ + 0xffffffff, /* src_mask */ + 0xffffffff, /* dst_mask */ + TRUE); /* pcrel_offset */ /* Swap in a MIPS 64-bit Rel reloc. */ @@ -2231,6 +2249,8 @@ return &elf_mips_gnu_vtinherit_howto; case BFD_RELOC_VTABLE_ENTRY: return &elf_mips_gnu_vtentry_howto; + case BFD_RELOC_32_PCREL: + return &elf_mips_gnu_pcrel32; default: bfd_set_error (bfd_error_bad_value); return NULL; @@ -2262,6 +2282,8 @@ return &elf_mips_gnu_vtinherit_howto; if (strcasecmp (elf_mips_gnu_vtentry_howto.name, r_name) == 0) return &elf_mips_gnu_vtentry_howto; + if (strcasecmp (elf_mips_gnu_pcrel32.name, r_name) == 0) + return &elf_mips_gnu_pcrel32; if (strcasecmp (elf_mips_gnu_rel16_s2.name, r_name) == 0) return &elf_mips_gnu_rel16_s2; if (strcasecmp (elf_mips_gnu_rela16_s2.name, r_name) == 0) @@ -2286,6 +2308,8 @@ return &elf_mips_gnu_rela16_s2; else return &elf_mips_gnu_rel16_s2; + case R_MIPS_PC32: + return &elf_mips_gnu_pcrel32; default: if (r_type >= R_MIPS16_min && r_type < R_MIPS16_max) { Index: contrib/gcc/config/mips/mips.h =================================================================== --- contrib/gcc/config/mips/mips.h +++ contrib/gcc/config/mips/mips.h @@ -2721,6 +2721,7 @@ nop\n\ 1: .cpload $31\n\ .set reorder\n\ + .local " USER_LABEL_PREFIX #FUNC "\n\ jal " USER_LABEL_PREFIX #FUNC "\n\ " TEXT_SECTION_ASM_OP); #endif /* Switch to #elif when we're no longer limited by K&R C. */ @@ -2732,6 +2733,7 @@ bal 1f\n\ nop\n\ 1: .set reorder\n\ + .local " USER_LABEL_PREFIX #FUNC "\n\ .cpsetup $31, $2, 1b\n\ jal " USER_LABEL_PREFIX #FUNC "\n\ " TEXT_SECTION_ASM_OP); Index: contrib/top/loadavg.h =================================================================== --- contrib/top/loadavg.h +++ contrib/top/loadavg.h @@ -19,7 +19,7 @@ * * Defined types: load_avg for load averages, pctcpu for cpu percentages. */ -#if defined(mips) && !(defined(NetBSD) || defined(FreeBSD)) +#if defined(mips) && !(defined(NetBSD) || defined(__FreeBSD__)) # include # if defined(FBITS) && !defined(FSCALE) # define FSCALE (1 << FBITS) /* RISC/os on mips */ Index: lib/csu/mips/crti.S =================================================================== --- lib/csu/mips/crti.S +++ lib/csu/mips/crti.S @@ -1,7 +1,9 @@ #include __FBSDID("$FreeBSD$"); +#ifndef __clang__ .gnu_attribute 4, 0 +#endif .section .init,"ax",%progbits .align 4 .globl _init Index: lib/csu/mips/crtn.S =================================================================== --- lib/csu/mips/crtn.S +++ lib/csu/mips/crtn.S @@ -1,7 +1,9 @@ #include __FBSDID("$FreeBSD$"); +#ifndef __clang__ .gnu_attribute 4, 0 +#endif .section .init,"ax",%progbits .align 4 .set noreorder Index: libexec/rtld-elf/mips/rtld_start.S =================================================================== --- libexec/rtld-elf/mips/rtld_start.S +++ libexec/rtld-elf/mips/rtld_start.S @@ -133,8 +133,10 @@ /* .got = $gp - 0x7ff0 */ /* Simple math as you can see. */ #if defined(__mips_n64) + not t0, zero + srl t0, 1 ld a0, 8(a0) /* object = pltgot[1] */ - and a0, a0, 0x7fffffffffffffff + and a0, a0, t0 #else lw a0, 4(a0) /* object = pltgot[1] & 0x7fffffff */ and a0, a0, 0x7fffffff Index: share/mk/src.opts.mk =================================================================== --- share/mk/src.opts.mk +++ share/mk/src.opts.mk @@ -221,7 +221,8 @@ # build Clang without using an external compiler. .if ${COMPILER_FEATURES:Mc++11} && (${__T} == "aarch64" || \ - ${__T} == "amd64" || ${__TT} == "arm" || ${__T} == "i386") + ${__T} == "amd64" || ${__TT} == "arm" || ${__T} == "i386" || \ + ${__T} == "mips64") # Clang is enabled, and will be installed as the default /usr/bin/cc. __DEFAULT_YES_OPTIONS+=CLANG CLANG_BOOTSTRAP CLANG_FULL CLANG_IS_CC __DEFAULT_NO_OPTIONS+=GCC GCC_BOOTSTRAP GNUCXX Index: sys/boot/mips/beri/boot2/Makefile =================================================================== --- sys/boot/mips/beri/boot2/Makefile +++ sys/boot/mips/beri/boot2/Makefile @@ -63,7 +63,6 @@ LDFLAGS= -nostdlib \ -static \ - -N \ -G0 \ -L${.CURDIR} Index: sys/mips/include/asm.h =================================================================== --- sys/mips/include/asm.h +++ sys/mips/include/asm.h @@ -253,7 +253,7 @@ MSG(msg) #define MSG(msg) \ - .rdata; \ + .section .rdata; \ 9: .asciiz msg; \ .text Index: sys/mips/mips/exception.S =================================================================== --- sys/mips/mips/exception.S +++ sys/mips/mips/exception.S @@ -190,7 +190,9 @@ PTR_SLL k1, k1, 1 # shift to get 8-byte offset #endif 1: + .set at PTR_LA k0, _C_LABEL(machExceptionTable) # get base of the jump table + .set noat PTR_ADDU k0, k0, k1 # Get the address of the # function entry. Note that # the cause is already @@ -1116,8 +1118,11 @@ mtc0 t1, MIPS_COP_0_STATUS HAZARD_DELAY ITLBNOPFIX + .set push + .set hardfloat cfc1 t1, MIPS_FPU_CSR # stall til FP done cfc1 t1, MIPS_FPU_CSR # now get status + .set pop nop sll t2, t1, (31 - 17) # unimplemented operation? bgez t2, 3f # no, normal trap @@ -1174,8 +1179,11 @@ 3: GET_CPU_PCPU(a0) PTR_L a0, PC_CURTHREAD(a0) # get current thread + .set push + .set hardfloat cfc1 a2, MIPS_FPU_CSR # code = FP execptions ctc1 zero, MIPS_FPU_CSR # Clear exceptions + .set pop PTR_LA t3, _C_LABEL(trapsignal) jalr t3 li a1, SIGFPE Index: sys/mips/mips/fp.S =================================================================== --- sys/mips/mips/fp.S +++ sys/mips/mips/fp.S @@ -115,7 +115,7 @@ ctc1 a1, MIPS_FPU_CSR j a3 - .rdata + .section .rdata func_fmt_tbl: .word add_s # 0 .word add_d # 0 @@ -2272,7 +2272,7 @@ lw a3, get_fs_int_tbl(a3) # switch on register number j a3 - .rdata + .section .rdata get_fs_int_tbl: .word get_fs_int_f0 .word get_fs_int_f2 @@ -2370,7 +2370,7 @@ lw a3, get_ft_s_tbl(a3) # switch on register number j a3 - .rdata + .section .rdata get_ft_s_tbl: .word get_ft_s_f0 .word get_ft_s_f2 @@ -2468,7 +2468,7 @@ lw a3, get_fs_s_tbl(a3) # switch on register number j a3 - .rdata + .section .rdata get_fs_s_tbl: .word get_fs_s_f0 .word get_fs_s_f2 @@ -2572,7 +2572,7 @@ lw a3, get_ft_d_tbl(a3) # switch on register number j a3 - .rdata + .section .rdata get_ft_d_tbl: .word get_ft_d_f0 .word get_ft_d_f2 @@ -2687,7 +2687,7 @@ lw a3, get_fs_d_tbl(a3) # switch on register number j a3 - .rdata + .section .rdata get_fs_d_tbl: .word get_fs_d_f0 .word get_fs_d_f2 @@ -2805,7 +2805,7 @@ lw a3, cmp_fs_s_tbl(a3) # switch on register number j a3 - .rdata + .section .rdata cmp_fs_s_tbl: .word cmp_fs_s_f0 .word cmp_fs_s_f2 @@ -2883,7 +2883,7 @@ lw a3, cmp_ft_s_tbl(a3) # switch on register number j a3 - .rdata + .section .rdata cmp_ft_s_tbl: .word cmp_ft_s_f0 .word cmp_ft_s_f2 @@ -2983,7 +2983,7 @@ lw a3, cmp_fs_d_tbl(a3) # switch on register number j a3 - .rdata + .section .rdata cmp_fs_d_tbl: .word cmp_fs_d_f0 .word cmp_fs_d_f2 @@ -3077,7 +3077,7 @@ lw a3, cmp_ft_d_tbl(a3) # switch on register number j a3 - .rdata + .section .rdata cmp_ft_d_tbl: .word cmp_ft_d_f0 .word cmp_ft_d_f2 @@ -3202,7 +3202,7 @@ lw a3, set_fd_s_tbl(a3) # switch on register number j a3 - .rdata + .section .rdata set_fd_s_tbl: .word set_fd_s_f0 .word set_fd_s_f2 @@ -3297,7 +3297,7 @@ lw a3, set_fd_d_tbl(a3) # switch on register number j a3 - .rdata + .section .rdata set_fd_d_tbl: .word set_fd_d_f0 .word set_fd_d_f2 Index: sys/mips/mips/locore.S =================================================================== --- sys/mips/mips/locore.S +++ sys/mips/mips/locore.S @@ -195,7 +195,7 @@ PTR_SUBU sp, a0, CALLFRAME_SIZ jal _C_LABEL(mi_startup) # mi_startup(frame) - sw zero, CALLFRAME_SIZ - 8(sp) # Zero out old fp for debugger + sw zero, ((CALLFRAME_SIZ) - 8)(sp) # Zero out old fp for debugger PANIC("Startup failed!") Index: usr.bin/Makefile =================================================================== --- usr.bin/Makefile +++ usr.bin/Makefile @@ -284,7 +284,10 @@ SUBDIR.${MK_TOOLCHAIN}+= unifdef SUBDIR.${MK_TOOLCHAIN}+= size SUBDIR.${MK_TOOLCHAIN}+= strings -.if ${MACHINE_ARCH} != "aarch64" # ARM64TODO xlint does not build +# ARM64TODO xlint does not build +# MIPS64 clang doesn't build this yet +.if ${MACHINE_ARCH} != "aarch64" && \ +(${MACHINE_ARCH} == "mips64" && ${COMPILER_TYPE} == "gcc") SUBDIR.${MK_TOOLCHAIN}+= xlint .endif SUBDIR.${MK_TOOLCHAIN}+= xstr