Page MenuHomeFreeBSD

[BCMA/MIPS74k] IRQ-to-Core discovery via MIPS core mapping
ClosedPublic

Authored by mizhka on Sep 3 2016, 9:14 PM.
Tags
None
Referenced Files
Unknown Object (File)
Mar 18 2024, 5:00 PM
Unknown Object (File)
Dec 20 2023, 12:57 AM
Unknown Object (File)
Nov 16 2023, 11:47 AM
Unknown Object (File)
Nov 8 2023, 7:49 AM
Unknown Object (File)
Nov 5 2023, 4:35 PM
Unknown Object (File)
Oct 15 2023, 10:41 AM
Unknown Object (File)
Oct 7 2023, 6:40 AM
Unknown Object (File)
Oct 4 2023, 3:32 PM
Subscribers

Details

Reviewers
landonf
adrian
Summary

MIPS core maps IRQ to OOB lines. Usually it's one-to-one, moreover IRQ# is same as OOB line number. But for some SoCs it can be different.

This adds IRQ discovery for BHND devices and avoid usage of static IRQ assignment.

Sample of output:
bhnd_mips0: <MIPS MIPS74k CPU, rev 1> mem 0x18003000-0x18003fff,0x18103000-0x18103fff at core 3 on bhnd0
bhnd_mips0: [BHND info] mipscore_attach:154 => ChipCommon I/O Controller: IRQ 2 as rid 0
bhnd_mips0: [BHND info] mipscore_attach:154 => 802.11 MAC/PHY/Radio: IRQ 3 as rid 0
bhnd_mips0: [BHND info] mipscore_attach:154 => Gigabit MAC core: IRQ 4 as rid 0
bhnd_mips0: [BHND info] mipscore_attach:154 => USB 2.0 Host Controller: IRQ 5 as rid 0
bhnd_mips0: [BHND info] mipscore_attach:154 => PCIe Bridge: IRQ 6 as rid 0

This patch is written in parallel with D7769, but it doesn't interfere with it. IMHO, some work should be done to marry them :)

Test Plan

Asus RT-N16: USB & UART & GMAC

Diff Detail

Repository
rS FreeBSD src repository - subversion
Lint
Lint Skipped
Unit
Tests Skipped

Event Timeline

mizhka retitled this revision from to [BCMA/MIPS74k] IRQ-to-Core discovery via MIPS core mapping.
mizhka updated this object.
mizhka edited the test plan for this revision. (Show Details)
mizhka added reviewers: landonf, adrian.
mizhka set the repository for this revision to rS FreeBSD src repository - subversion.

This patch is written in parallel with D7769, but it doesn't interfere with it. IMHO, some work should be done to marry them :)

Once the INTRNG regression got ironed out, my thinking around D7769 was:

  • Move (bhnd|siba|bcma|)_nexus into sys/mips/broadcom so that we can depend directly on MIPS-specific behavior. There's very little code there, and making it arch-specific simplifies things.
  • Split bcm_mipscore.c into bcm_mips (BMIPS32/BMIPS3300) and bcm_mips74k drivers. The BMIPS32/3300 cores use a common register block layout, and are only found on siba(4) devices, whereas the MIPS74K cores are only found on bmca(4) devices.
  • Implement the PIC interface in bcm_mips/bcm_mips74k, and allocates 32 IRQs for assignment to bus cores.
  • Add a bhnd_nexus implementation of BHND_BUS_ASSIGN_INTR, mapping backplane interrupt vectors (OOBSEL on bcma, sflag# on siba) to those IRQs.
  • If necessary, filtering on shared MIPS IRQs can be implemented on by looking at the INTR_STATUS (BMIPS32/BMIPS3300) on siba(4) devices, and the OOB router core's OOB_STATUSA register on bcma(4) devices.

I sketched out some of this here, when I was trying to make sure D7769's API design would work for MIPS: https://github.com/landonf/freebsd/tree/user/landonf/bhnd/7200_bus_intr_mips/sys/mips/broadcom

This patch is written in parallel with D7769, but it doesn't interfere with it. IMHO, some work should be done to marry them :)

Once the INTRNG regression got ironed out, my thinking around D7769 was:

  • Move (bhnd|siba|bcma|)_nexus into sys/mips/broadcom so that we can depend directly on MIPS-specific behavior. There's very little code there, and making it arch-specific simplifies things.

NP at all, no dep on IRQ :)

  • Split bcm_mipscore.c into bcm_mips (BMIPS32/BMIPS3300) and bcm_mips74k drivers. The BMIPS32/3300 cores use a common register block layout, and are only found on siba(4) devices, whereas the MIPS74K cores are only found on bmca(4) devices.

As no 33xx bits in bcm_mipscore.c it's easy to rename it to mips74k (excl. 33xx/32 from matching table) and create new driver for 33xx

  • Implement the PIC interface in bcm_mips/bcm_mips74k, and allocates 32 IRQs for assignment to bus cores.

Fine, but MIPS74k has few IRQs (6?) according to MIPS specs.

  • Add a bhnd_nexus implementation of BHND_BUS_ASSIGN_INTR, mapping backplane interrupt vectors (OOBSEL on bcma, sflag# on siba) to those IRQs.

I can do / test it for BCMA, plz land D7769

  • If necessary, filtering on shared MIPS IRQs can be implemented on by looking at the INTR_STATUS (BMIPS32/BMIPS3300) on siba(4) devices, and the OOB router core's OOB_STATUSA register on bcma(4) devices.

I have lack of doc, can you please share knowledge about Out-Of-Band router? Many thanks in advance

I sketched out some of this here, when I was trying to make sure D7769's API design would work for MIPS: https://github.com/landonf/freebsd/tree/user/landonf/bhnd/7200_bus_intr_mips/sys/mips/broadcom

Please land this sketches too. :)

mizhka edited edge metadata.

Rebased to -HEAD

adrian edited edge metadata.

Go for it!

This revision is now accepted and ready to land.Nov 19 2016, 6:35 PM

Do you mind if I close this as superseded by rS326079?