Index: sys/mips/broadcom/bcm_machdep.c =================================================================== --- sys/mips/broadcom/bcm_machdep.c +++ sys/mips/broadcom/bcm_machdep.c @@ -71,17 +71,12 @@ #include #include -#include #include "bcm_socinfo.h" #ifdef CFE #include #endif -#if 0 -#define BROADCOM_TRACE 0 -#endif - extern int *edata; extern int *end; @@ -109,18 +104,11 @@ result = cfe_enummem(i / 2, 0, &addr, &len, &type); if (result < 0) { -#ifdef BROADCOM_TRACE - printf("There is no phys memory for: %d\n", i); -#endif phys_avail[i] = phys_avail[i + 1] = 0; break; } - if (type != CFE_MI_AVAILABLE){ -#ifdef BROADCOM_TRACE - printf("phys memory is not available: %d\n", i); -#endif + if (type != CFE_MI_AVAILABLE) continue; - } phys_avail[i] = addr; if (i == 0 && addr == 0) { @@ -131,19 +119,10 @@ */ phys_avail[i] += MIPS_KSEG0_TO_PHYS(kernel_kseg0_end); } -#ifdef BROADCOM_TRACE - printf("phys memory is available for: %d\n", i); - printf(" => addr = %jx\n", addr); - printf(" => len = %jd\n", len); -#endif phys_avail[i + 1] = addr + len; physmem += len; } -#ifdef BROADCOM_TRACE - printf("Total phys memory is : %ld\n", physmem); -#endif - realmem = btoc(physmem); #endif @@ -165,15 +144,21 @@ #endif } -#define BCM_REG_CHIPC 0x18000000 - - void platform_reset(void) { printf("bcm::platform_reset()\n"); intr_disable(); + +#if defined(CFE) + cfe_exit(0, 0); +#else BCM_WRITE_REG32(BCM_REG_CHIPC_PMUWD_OFFS, 2); /* PMU watchdog */ + + // TODO: non-PMU reset + // *((volatile uint8_t *)MIPS_PHYS_TO_KSEG1(SENTRY5_EXTIFADR)) = 0x80; +#endif + for (;;); } @@ -194,6 +179,37 @@ /* Initialize pcpu stuff */ mips_pcpu0_init(); +#if 0 + /* + * Probe the Broadcom on-chip PLL clock registers + * and discover the CPU pipeline clock and bus clock + * multipliers from this. + * XXX: Wrong place. You have to ask the ChipCommon + * or External Interface cores on the SiBa. + */ + uint32_t busmult, cpumult, refclock, clkcfg1; +#define S5_CLKCFG1_REFCLOCK_MASK 0x0000001F +#define S5_CLKCFG1_BUSMULT_MASK 0x000003E0 +#define S5_CLKCFG1_BUSMULT_SHIFT 5 +#define S5_CLKCFG1_CPUMULT_MASK 0xFFFFFC00 +#define S5_CLKCFG1_CPUMULT_SHIFT 10 + + counter_freq = 100000000; /* XXX */ + + clkcfg1 = s5_rd_clkcfg1(); + printf("clkcfg1 = 0x%08x\n", clkcfg1); + + refclock = clkcfg1 & 0x1F; + busmult = ((clkcfg1 & 0x000003E0) >> 5) + 1; + cpumult = ((clkcfg1 & 0xFFFFFC00) >> 10) + 1; + + printf("refclock = %u\n", refclock); + printf("busmult = %u\n", busmult); + printf("cpumult = %u\n", cpumult); + + counter_freq = cpumult * refclock; +#endif + socinfo = bcm_get_socinfo(); platform_counter_freq = socinfo->cpurate * 1000 * 1000; /* BCM4718 is 480MHz */ @@ -212,10 +228,10 @@ if (a3 == CFE_EPTSEAL) cfe_init(a0, a2); #endif + cninit(); mips_init(); - /* BCM471x timer is 1/2 of Clk */ - mips_timer_init_params(platform_counter_freq, 1); + mips_timer_init_params(platform_counter_freq, socinfo->double_count); } Index: sys/mips/broadcom/bcm_socinfo.h =================================================================== --- sys/mips/broadcom/bcm_socinfo.h +++ sys/mips/broadcom/bcm_socinfo.h @@ -35,9 +35,10 @@ #include struct bcm_socinfo { - uint32_t id; - uint32_t cpurate; /* in MHz */ - uint32_t uartrate; /* in Hz */ + uint32_t id; + uint32_t cpurate; /* in MHz */ + uint32_t uartrate; /* in Hz */ + int double_count; }; struct bcm_socinfo* bcm_get_socinfo_by_socid(uint32_t key); Index: sys/mips/broadcom/bcm_socinfo.c =================================================================== --- sys/mips/broadcom/bcm_socinfo.c +++ sys/mips/broadcom/bcm_socinfo.c @@ -33,22 +33,23 @@ /* found on https://wireless.wiki.kernel.org/en/users/drivers/b43/soc */ struct bcm_socinfo bcm_socinfos[] = { - {0x00005300, 600, 25000000}, /* BCM4706 to check */ - {0x0022B83A, 300, 20000000}, /* BCM4716B0 ASUS RT-N12 */ - {0x00914716, 354, 20000000}, /* BCM4717A1 to check */ - {0x00A14716, 480, 20000000}, /* BCM4718A1 ASUS RT-N16 */ - {0x00435356, 300, 25000000}, /* BCM5356A1 (RT-N10, WNR1000v3) */ - {0x00825357, 500, 20000000}, /* BCM5358UB0 ASUS RT-N53A1 */ - {0x00845357, 300, 20000000}, /* BCM5357B0 to check */ - {0x00945357, 500, 20000000}, /* BCM5358 */ - {0x00A45357, 500, 20000000}, /* BCM47186B0 Tenda N60 */ - {0x0085D144, 300, 20000000}, /* BCM5356C0 */ - {0x00B5D144, 300, 20000000}, /* BCM5357C0 */ + {0x00005300, 600, 25000000, 1}, /* BCM4706 to check */ + {0x0022B83A, 300, 20000000, 1}, /* BCM4716B0 ASUS RT-N12 */ + {0x00914716, 354, 20000000, 1}, /* BCM4717A1 to check */ + {0x00A14716, 480, 20000000, 1}, /* BCM4718A1 ASUS RT-N16 */ + {0x00435356, 300, 25000000, 1}, /* BCM5356A1 (RT-N10, WNR1000v3) */ + {0x00825357, 500, 20000000, 1}, /* BCM5358UB0 ASUS RT-N53A1 */ + {0x00845357, 300, 20000000, 1}, /* BCM5357B0 to check */ + {0x00945357, 500, 20000000, 1}, /* BCM5358 */ + {0x00A45357, 500, 20000000, 1}, /* BCM47186B0 Tenda N60 */ + {0x0085D144, 300, 20000000, 1}, /* BCM5356C0 */ + {0x00B5D144, 300, 20000000, 1}, /* BCM5357C0 */ + {0x00015365, 200, 0, 1}, /* BCM5365 */ {0,0,0} }; /* Most popular BCM SoC info */ -struct bcm_socinfo BCM_DEFAULT_SOCINFO = {0x0, 300, 20000000}; +struct bcm_socinfo BCM_DEFAULT_SOCINFO = {0x0, 300, 20000000, 0}; struct bcm_socinfo* bcm_get_socinfo_by_socid(uint32_t key) Index: sys/mips/broadcom/std.broadcom =================================================================== --- sys/mips/broadcom/std.broadcom +++ sys/mips/broadcom/std.broadcom @@ -3,5 +3,4 @@ machine mips mipsel -cpu CPU_MIPS74K files "../broadcom/files.broadcom" Index: sys/mips/broadcom/uart_cpu_chipc.c =================================================================== --- sys/mips/broadcom/uart_cpu_chipc.c +++ sys/mips/broadcom/uart_cpu_chipc.c @@ -59,20 +59,53 @@ { struct uart_class *class; struct bcm_socinfo *socinfo; + int ivar, maddr; - socinfo = bcm_get_socinfo(); class = &uart_ns8250_class; - di->ops = uart_getops(class); - di->bas.chan = 0; - di->bas.bst = mips_bus_space_generic; - di->bas.bsh = (bus_space_handle_t)BCM_SOCREG(BCM_REG_CHIPC_UART); - di->bas.regshft = 0; - di->bas.rclk = socinfo->uartrate; /* in Hz */ - di->baudrate = 115200; - di->databits = 8; - di->stopbits = 1; - di->parity = UART_PARITY_NONE; uart_bus_space_io = NULL; uart_bus_space_mem = mips_bus_space_generic; - return (0); + + /* Check the environment. */ + if (uart_getenv(devtype, di, class) == 0) + return (0); + + /* Scan the device hints for the first matching device */ + for (int i = 0; i < 3; i++) { // TODO: Fetch max uart from chipc + if (resource_int_value("uart", i, "flags", &ivar)) + continue; + + /* Check usability */ + if (devtype == UART_DEV_CONSOLE && !UART_FLAGS_CONSOLE(ivar)) + continue; + + if (devtype == UART_DEV_DBGPORT && !UART_FLAGS_DBGPORT(ivar)) + continue; + + if (resource_int_value("uart", i, "disabled", &ivar) == 0 && + ivar == 0) + continue; + + if (resource_int_value("uart", i, "maddr", &maddr) != 0 || + maddr == 0) + continue; + + /* Found */ + socinfo = bcm_get_socinfo(); + di->ops = uart_getops(class); + di->bas.chan = 0; + di->bas.bst = uart_bus_space_mem; + di->bas.bsh = (bus_space_handle_t)MIPS_PHYS_TO_KSEG1(maddr); + di->bas.regshft = 0; + di->bas.rclk = socinfo->uartrate; /* in Hz */ + if (resource_int_value("uart", i, "baud", &ivar) != 0) + ivar = 115200; + di->baudrate = ivar; + di->databits = 8; + di->stopbits = 1; + di->parity = UART_PARITY_NONE; + + return (0); + } + + return (ENXIO); } Index: sys/mips/conf/BCM47XX =================================================================== --- /dev/null +++ sys/mips/conf/BCM47XX @@ -0,0 +1,38 @@ +# +# BCM47xx - Generic kernel configuration file for FreeBSD/MIPS on Broadcom 47xx +# SoCs. +# +# $FreeBSD$ +# + +# Include the default BCM parameters +include "BCM_BASE" + +ident BCM47xx +cpu CPU_MIPS74K +makeoptions TRAMPLOADADDR=0x80800000 + +# Override hints with bcm47xx values +hints "BCM47XX.hints" + +# The 47xx devices shipped with both bcma(4) and siba(4)-based interconnects +device bcma # 47xx bcma(4) devices +device bcma_nexus +device siba +device siba_nexus + +device bhnd_pcib # Broadcom PCI/PCIe core +#device bhnd_pci2b # Broadcom PCIe-G2 core - not yet + +#device bgmac # Broadcom GMAC - not yet + +# switch support +device mdio + +# flash +device spibus # Serial Flash +device mx25l + +device cfi # Parallel Flash +device cfid + Index: sys/mips/conf/BCM47XX.hints =================================================================== --- /dev/null +++ sys/mips/conf/BCM47XX.hints @@ -0,0 +1,6 @@ +# $FreeBSD$ + +# uart0 console +hint.uart.0.flags="0x10" +hint.uart.0.maddr="0x18000300" +hint.uart.0.size="0x100" Index: sys/mips/conf/BCM_BASE =================================================================== --- sys/mips/conf/BCM_BASE +++ sys/mips/conf/BCM_BASE @@ -1,13 +1,19 @@ # -# $FreeBSD$ +# BCM_BASE -- Kernel configuration base file for the 47xx/53xx/63xx family +# of Broadcom SoCs using a bhnd(4)-compatible bus interconnect. +# +# This file (and the hints file accompanying it) are not designed to be +# used by themselves. Instead, users of this file should create a kernel +# config file which includes this file (which gets the basic hints), then +# override the default options (adding devices as needed) and adding +# hints as needed. # -# The Broadcom 470x/471x/535x series of processors and boards is very commonly -# used in COTS hardware including the ASUS RT-N12, RT-N16, RT-N53. +# $FreeBSD$ # -ident BCM +ident BCM_BASE -hints "BCM.hints" +hints "BCM_BASE.hints" include "../broadcom/std.broadcom" # ships with cfe firmware @@ -19,7 +25,6 @@ makeoptions INTRNG options INTRNG -makeoptions TRAMPLOADADDR=0x80800000 makeoptions DEBUG="-g3" #Build kernel with gdb(1) debug symbols makeoptions MODULES_OVERRIDE="" @@ -40,9 +45,9 @@ device geom_uzip options GEOM_UZIP -options GEOM_LABEL # Providers labelization. +options GEOM_LABEL # Providers labelization. options ROOTDEVNAME=\"ufs:ufs/FBSD\" # assumes FW built by - # freebsd-build-wifi + # freebsd-build-wifi # Debugging for use in -current #options DEADLKRES @@ -52,49 +57,36 @@ #options BHND_LOGLEVEL=BHND_DEBUG_LEVEL #options BUS_DEBUG #makeoptions BUS_DEBUG -#options VERBOSE_SYSINIT -#makeoptions VERBOSE_SYSINIT + +# PMC +#options HWPMC_HOOKS +#device hwpmc +#device hwpmc_mips24k # bhnd(4) device bhnd -device bcma # bcma backplane -device bcma_nexus - -device pci -device bhnd_pcib # PCIe-G1 core - -#device bgmac # Broadcom GMAC - not yet -device mdio +# wireless +options IEEE80211_DEBUG +options IEEE80211_SUPPORT_MESH +options IEEE80211_SUPPORT_TDMA +options IEEE80211_SUPPORT_SUPERG +options IEEE80211_ALQ # 802.11 ALQ logging support +options ALQ +device wlan # 802.11 support +device wlan_wep # 802.11 WEP support +device wlan_ccmp # 802.11 CCMP support +device wlan_tkip # 802.11 TKIP support +device wlan_xauth # 802.11 hostap support + +options USB_DEBUG # enable debug msgs +device usb # USB Bus (required) +device uhci # UHCI PCI->USB interface +device ehci # EHCI PCI->USB interface (USB 2.0) -#Flash -device spibus -device mx25l # Serial Flash -device cfi # Parallel Flash -device cfid - -#UART device uart -#Base device loop device ether device random device md - -#Performance -#options HWPMC_HOOKS -#device hwpmc -#device hwpmc_mips74k - -#Ethernet -# device bfe # XXX will build both pci and siba -device miibus # attachments - -# pci devices - -# USB is not yet ready -#options USB_DEBUG # enable debug msgs -#device usb # USB Bus (required) -#device uhci # UHCI PCI->USB interface -#device ehci # EHCI PCI->USB interface (USB 2.0) Index: sys/mips/conf/BCM_BASE.hints =================================================================== --- sys/mips/conf/BCM_BASE.hints +++ sys/mips/conf/BCM_BASE.hints @@ -2,4 +2,3 @@ hint.bhnd.0.at="nexus0" hint.bhnd.0.maddr="0x18000000" hint.bhnd.0.msize="0x00100000" - Index: sys/mips/conf/SENTRY5 =================================================================== --- sys/mips/conf/SENTRY5 +++ sys/mips/conf/SENTRY5 @@ -1,89 +1,41 @@ # -# $FreeBSD$ -# -# The Broadcom Sentry5 series of processors and boards is very commonly -# used in COTS hardware including the Netgear WGT634U. -# -# Some tweaks are needed for use with this platform: -# -# * CFE firmware's ELF loader expects an ELF kernel which is linked so as -# not to contain offsets in PT_LOAD which point behind the actual offset -# of that PT header. FreeBSD normally links the first PT_LOAD header to -# begin at offset 0. -# -# * Broadcom's support package for the internal bus, the Sonics -# SiliconBackplane, needs to be integrated to detect and probe hardware -# correctly. +# BCM_SENTRY5 - Generic kernel configuration file for FreeBSD/MIPS on Broadcom +# Sentry5 SoCs. # -# * The clock needs to be calibrated correctly, so that DELAY() may work. -# One problem with this is that the low-level printf() routine calls DELAY(), -# which currently causes divide-by-zero trap +# The Sentry5 series of SoCs is commonly found in COTS hardware such as the +# Netgear WGT634U. # -# * The Broadcom CPUs have no FPU. Attempting to detect one by reading CP1's -# status register causes an unhandled boot-time exception. An FPU emulator -# will be necessary to support multi-user boot. +# $FreeBSD$ # +# Include the default BCM parameters +include "BCM_BASE" + ident SENTRY5 +cpu CPU_MIPS4KC +options CPU_SENTRY5 # XXX should this be a + # sub-cpu option? +makeoptions TRAMPLOADADDR=0x807963c0 -# XXX only siba should be hardwired for now; we will use -# bus enumeration there +# Override hints with board values hints "SENTRY5.hints" -include "../sentry5/std.sentry5" - -# sentry5 normally ships with cfe firmware; use the console for now -options CFE -options CFE_CONSOLE -options ALT_BREAK_TO_DEBUGGER - -makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols -makeoptions MODULES_OVERRIDE="" -options DDB -options KDB - -options SCHED_4BSD #4BSD scheduler -options INET #InterNETworking -options NFSCL #Network Filesystem Client -options NFS_ROOT #NFS usable as /, requires NFSCL -options PSEUDOFS #Pseudo-filesystem framework -options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions - -# Debugging for use in -current -#options DEADLKRES -options INVARIANTS -options INVARIANT_SUPPORT - -#options BUS_DEBUG -#makeoptions BUS_DEBUG - -device bhnd +# All Sentry5 chipsets use siba(4) interconnect device siba device siba_nexus -device bhnd_pcib -device pci # bhnd_pcib + +device pci +device bhnd_pcib # PCI(e) G1 core # device bfe # XXX will build both pci and siba # device miibus # attachments # pci devices -# notyet: -#device ath # in pci slot -#device ath_pci # Atheros pci/cardbus glue -#device ath_hal # pci chip support +device ath # in pci slot +device ath_rate_sample +device ath_pci # Atheros pci/cardbus glue +device ath_hal # pci chip support #options AH_SUPPORT_AR5416 # enable AR5416 tx/rx descriptors -options USB_DEBUG # enable debug msgs -device usb # USB Bus (required) -device uhci # UHCI PCI->USB interface -device ehci # EHCI PCI->USB interface (USB 2.0) - -# need to teach the code to ignore the bridge.... - - -# XXX notyet; need to be auto probed children of siba_cc. -#device uart - -device loop -device ether -device md +device cfi # parallel flash +device cfid Index: sys/mips/conf/SENTRY5.hints =================================================================== --- sys/mips/conf/SENTRY5.hints +++ sys/mips/conf/SENTRY5.hints @@ -1,5 +1,6 @@ # $FreeBSD$ -hint.bhnd.0.at="nexus0" -hint.bhnd.0.maddr="0x18000000" -hint.bhnd.0.msize="0x1000" -# XXX irq? + +# uart1 console +hint.uart.1.flags="0x10" +hint.uart.1.maddr="0x18000400" +hint.uart.1.size="0x100" Index: sys/mips/sentry5/files.sentry5 =================================================================== --- sys/mips/sentry5/files.sentry5 +++ /dev/null @@ -1,9 +0,0 @@ -# $FreeBSD$ - -# TODO: Add attachment elsehwere in the tree -# for USB 1.1 OHCI, Ethernet and IPSEC cores -# which are believed to be devices we have drivers for -# which just need to be tweaked for attachment to an SSB system bus. -mips/sentry5/s5_machdep.c standard -mips/mips/intr_machdep.c standard -mips/mips/tick.c standard Index: sys/mips/sentry5/obio.c =================================================================== --- sys/mips/sentry5/obio.c +++ /dev/null @@ -1,183 +0,0 @@ -/* $NetBSD: obio.c,v 1.11 2003/07/15 00:25:05 lukem Exp $ */ - -/*- - * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc. - * All rights reserved. - * - * Written by Jason R. Thorpe for Wasabi Systems, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the NetBSD Project by - * Wasabi Systems, Inc. - * 4. The name of Wasabi Systems, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * On-board device autoconfiguration support for Broadcom Sentry5 - * based boards. - * XXX This is totally bogus and is just enough to get the console hopefully - * running on the sentry5. - */ - -#include -__FBSDID("$FreeBSD$"); - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -int obio_probe(device_t); -int obio_attach(device_t); - -/* - * A bit tricky and hackish. Since we need OBIO to rely - * on PCI we make it pseudo-pci device. But there should - * be only one such device, so we use this static flag - * to prevent false positives on every realPCI device probe. - */ -static int have_one = 0; - -int -obio_probe(device_t dev) -{ - if (!have_one) { - have_one = 1; - return 0; - } - return (ENXIO); -} - -int -obio_attach(device_t dev) -{ - struct obio_softc *sc = device_get_softc(dev); - - sc->oba_st = MIPS_BUS_SPACE_IO; - sc->oba_addr = MIPS_PHYS_TO_KSEG1(SENTRY5_UART1ADR); - sc->oba_size = 0x03FFFFFF; /* XXX sb pci bus 0 aperture size? */ - sc->oba_rman.rm_type = RMAN_ARRAY; - sc->oba_rman.rm_descr = "OBIO I/O"; - if (rman_init(&sc->oba_rman) != 0 || - rman_manage_region(&sc->oba_rman, - sc->oba_addr, sc->oba_addr + sc->oba_size) != 0) - panic("obio_attach: failed to set up I/O rman"); - sc->oba_irq_rman.rm_type = RMAN_ARRAY; - sc->oba_irq_rman.rm_descr = "OBIO IRQ"; - - /* - * This module is intended for UART purposes only and - * it's IRQ is 4 - */ - if (rman_init(&sc->oba_irq_rman) != 0 || - rman_manage_region(&sc->oba_irq_rman, 4, 4) != 0) - panic("obio_attach: failed to set up IRQ rman"); - - device_add_child(dev, "uart", 0); - bus_generic_probe(dev); - bus_generic_attach(dev); - - return (0); -} - -static struct resource * -obio_alloc_resource(device_t bus, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) -{ - struct resource *rv; - struct rman *rm; - bus_space_handle_t bh = 0; - struct obio_softc *sc = device_get_softc(bus); - - switch (type) { - case SYS_RES_IRQ: - rm = &sc->oba_irq_rman; - break; - case SYS_RES_MEMORY: - return (NULL); - case SYS_RES_IOPORT: - rm = &sc->oba_rman; - bh = sc->oba_addr; - start = bh; - break; - default: - return (NULL); - } - - - rv = rman_reserve_resource(rm, start, end, count, flags, child); - if (rv == NULL) - return (NULL); - if (type == SYS_RES_IRQ) - return (rv); - rman_set_rid(rv, *rid); - rman_set_bustag(rv, mips_bus_space_generic); - rman_set_bushandle(rv, bh); - - if (0) { - if (bus_activate_resource(child, type, *rid, rv)) { - rman_release_resource(rv); - return (NULL); - } - } - return (rv); - -} - -static int -obio_activate_resource(device_t bus, device_t child, int type, int rid, - struct resource *r) -{ - return (0); -} -static device_method_t obio_methods[] = { - DEVMETHOD(device_probe, obio_probe), - DEVMETHOD(device_attach, obio_attach), - - DEVMETHOD(bus_alloc_resource, obio_alloc_resource), - DEVMETHOD(bus_activate_resource, obio_activate_resource), - DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), - DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), - - {0, 0}, -}; - -static driver_t obio_driver = { - "obio", - obio_methods, - sizeof(struct obio_softc), -}; -static devclass_t obio_devclass; - -DRIVER_MODULE(obio, pci, obio_driver, obio_devclass, 0, 0); Index: sys/mips/sentry5/obiovar.h =================================================================== --- sys/mips/sentry5/obiovar.h +++ /dev/null @@ -1,58 +0,0 @@ -/* $NetBSD: obiovar.h,v 1.4 2003/06/16 17:40:53 thorpej Exp $ */ - -/*- - * Copyright (c) 2002, 2003 Wasabi Systems, Inc. - * All rights reserved. - * - * Written by Jason R. Thorpe for Wasabi Systems, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the NetBSD Project by - * Wasabi Systems, Inc. - * 4. The name of Wasabi Systems, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - * $FreeBSD$ - * - */ - -#ifndef _SENTRY5_OBIOVAR_H_ -#define _SENTRY5_OBIOVAR_H_ - -#include - -struct obio_softc { - bus_space_tag_t oba_st; /* bus space tag */ - bus_addr_t oba_addr; /* address of device */ - bus_size_t oba_size; /* size of device */ - int oba_width; /* bus width */ - int oba_irq; /* XINT interrupt bit # */ - struct rman oba_rman; - struct rman oba_irq_rman; - -}; -extern struct bus_space obio_bs_tag; - -#endif /* _SENTRY5_OBIOVAR_H_ */ Index: sys/mips/sentry5/s5_machdep.c =================================================================== --- sys/mips/sentry5/s5_machdep.c +++ /dev/null @@ -1,223 +0,0 @@ -/*- - * Copyright (c) 2007 Bruce M. Simpson. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -__FBSDID("$FreeBSD$"); - -#include "opt_ddb.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#ifdef CFE -#include -#endif - -extern int *edata; -extern int *end; - -void -platform_cpu_init() -{ - /* Nothing special */ -} - -static void -mips_init(void) -{ - int i, j; - - printf("entry: mips_init()\n"); - -#ifdef CFE - /* - * Query DRAM memory map from CFE. - */ - physmem = 0; - for (i = 0; i < 10; i += 2) { - int result; - uint64_t addr, len, type; - - result = cfe_enummem(i, 0, &addr, &len, &type); - if (result < 0) { - phys_avail[i] = phys_avail[i + 1] = 0; - break; - } - if (type != CFE_MI_AVAILABLE) - continue; - - phys_avail[i] = addr; - if (i == 0 && addr == 0) { - /* - * If this is the first physical memory segment probed - * from CFE, omit the region at the start of physical - * memory where the kernel has been loaded. - */ - phys_avail[i] += MIPS_KSEG0_TO_PHYS(kernel_kseg0_end); - } - phys_avail[i + 1] = addr + len; - physmem += len; - } - - realmem = btoc(physmem); -#endif - - for (j = 0; j < i; j++) - dump_avail[j] = phys_avail[j]; - - physmem = realmem; - - init_param1(); - init_param2(physmem); - mips_cpu_init(); - pmap_bootstrap(); - mips_proc0_init(); - mutex_init(); - kdb_init(); -#ifdef KDB - if (boothowto & RB_KDB) - kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger"); -#endif -} - -void -platform_reset(void) -{ - -#if defined(CFE) - cfe_exit(0, 0); -#else - *((volatile uint8_t *)MIPS_PHYS_TO_KSEG1(SENTRY5_EXTIFADR)) = 0x80; -#endif -} - -void -platform_start(__register_t a0, __register_t a1, __register_t a2, - __register_t a3) -{ - vm_offset_t kernend; - uint64_t platform_counter_freq; - - /* clear the BSS and SBSS segments */ - kernend = (vm_offset_t)&end; - memset(&edata, 0, kernend - (vm_offset_t)(&edata)); - - mips_postboot_fixup(); - - /* Initialize pcpu stuff */ - mips_pcpu0_init(); - -#ifdef CFE - /* - * Initialize CFE firmware trampolines before - * we initialize the low-level console. - * - * CFE passes the following values in registers: - * a0: firmware handle - * a2: firmware entry point - * a3: entry point seal - */ - if (a3 == CFE_EPTSEAL) - cfe_init(a0, a2); -#endif - cninit(); - - mips_init(); - -# if 0 - /* - * Probe the Broadcom Sentry5's on-chip PLL clock registers - * and discover the CPU pipeline clock and bus clock - * multipliers from this. - * XXX: Wrong place. You have to ask the ChipCommon - * or External Interface cores on the SiBa. - */ - uint32_t busmult, cpumult, refclock, clkcfg1; -#define S5_CLKCFG1_REFCLOCK_MASK 0x0000001F -#define S5_CLKCFG1_BUSMULT_MASK 0x000003E0 -#define S5_CLKCFG1_BUSMULT_SHIFT 5 -#define S5_CLKCFG1_CPUMULT_MASK 0xFFFFFC00 -#define S5_CLKCFG1_CPUMULT_SHIFT 10 - - counter_freq = 100000000; /* XXX */ - - clkcfg1 = s5_rd_clkcfg1(); - printf("clkcfg1 = 0x%08x\n", clkcfg1); - - refclock = clkcfg1 & 0x1F; - busmult = ((clkcfg1 & 0x000003E0) >> 5) + 1; - cpumult = ((clkcfg1 & 0xFFFFFC00) >> 10) + 1; - - printf("refclock = %u\n", refclock); - printf("busmult = %u\n", busmult); - printf("cpumult = %u\n", cpumult); - - counter_freq = cpumult * refclock; -# else - platform_counter_freq = 200 * 1000 * 1000; /* Sentry5 is 200MHz */ -# endif - - mips_timer_init_params(platform_counter_freq, 0); -} Index: sys/mips/sentry5/s5reg.h =================================================================== --- sys/mips/sentry5/s5reg.h +++ /dev/null @@ -1,58 +0,0 @@ -/* $FreeBSD$ */ - -#ifndef _MIPS32_SENTRY5_SENTRY5REG_H_ -#define _MIPS32_SENTRY5_SENTRY5REG_H_ - -#define SENTRY5_UART0ADR 0x18000300 -#define SENTRY5_UART1ADR 0x18000400 - -/* Reset register implemented here in a PLD device. */ -#define SENTRY5_EXTIFADR 0x1F000000 -#define SENTRY5_DORESET 0x80 - -/* - * Custom CP0 register macros. - * XXX: This really needs the mips cpuregs.h file for the barrier. - */ -#define S5_RDRW32_C0P0_CUST22(n,r) \ -static __inline u_int32_t \ -s5_rd_ ## n (void) \ -{ \ - int v0; \ - __asm __volatile ("mfc0 %[v0], $22, "__XSTRING(r)" ;" \ - : [v0] "=&r"(v0)); \ - /*mips_barrier();*/ \ - return (v0); \ -} \ -static __inline void \ -s5_wr_ ## n (u_int32_t a0) \ -{ \ - __asm __volatile ("mtc0 %[a0], $22, "__XSTRING(r)" ;" \ - __XSTRING(COP0_SYNC)";" \ - "nop;" \ - "nop;" \ - : \ - : [a0] "r"(a0)); \ - /*mips_barrier();*/ \ -} struct __hack - -/* - * All 5 of these sub-registers are used by Linux. - * There is a further custom register at 25 which is not used. - */ -#define S5_CP0_DIAG 0 -#define S5_CP0_CLKCFG1 1 -#define S5_CP0_CLKCFG2 2 -#define S5_CP0_SYNC 3 -#define S5_CP0_CLKCFG3 4 -#define S5_CP0_RESET 5 - -/* s5_[rd|wr]_xxx() */ -S5_RDRW32_C0P0_CUST22(diag, S5_CP0_DIAG); -S5_RDRW32_C0P0_CUST22(clkcfg1, S5_CP0_CLKCFG1); -S5_RDRW32_C0P0_CUST22(clkcfg2, S5_CP0_CLKCFG2); -S5_RDRW32_C0P0_CUST22(sync, S5_CP0_SYNC); -S5_RDRW32_C0P0_CUST22(clkcfg3, S5_CP0_CLKCFG3); -S5_RDRW32_C0P0_CUST22(reset, S5_CP0_RESET); - -#endif /* _MIPS32_SENTRY5_SENTRY5REG_H_ */ Index: sys/mips/sentry5/std.sentry5 =================================================================== --- sys/mips/sentry5/std.sentry5 +++ /dev/null @@ -1,10 +0,0 @@ -# $FreeBSD$ -# - -machine mips mipsel - -cpu CPU_MIPS4KC -options CPU_SENTRY5 # XXX should this be a - # sub-cpu option? -files "../sentry5/files.sentry5" - Index: sys/mips/sentry5/uart_bus_sbusart.c =================================================================== --- sys/mips/sentry5/uart_bus_sbusart.c +++ /dev/null @@ -1,95 +0,0 @@ -/*- - * Copyright (c) 2007 Bruce M. Simpson. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * $Id$ - */ -/* - * Skeleton of this file was based on respective code for ARM - * code written by Olivier Houchard. - */ - -/* - * XXXMIPS: This file is hacked from arm/... . XXXMIPS here means this file is - * experimental and was written for MIPS32 port. - */ -#include "opt_uart.h" - -#include -__FBSDID("$FreeBSD$"); - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -#include - -#include "uart_if.h" - -static int uart_malta_probe(device_t dev); - -extern struct uart_class malta_uart_class; - -static device_method_t uart_malta_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, uart_malta_probe), - DEVMETHOD(device_attach, uart_bus_attach), - DEVMETHOD(device_detach, uart_bus_detach), - { 0, 0 } -}; - -static driver_t uart_malta_driver = { - uart_driver_name, - uart_malta_methods, - sizeof(struct uart_softc), -}; - -extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs; -static int -uart_malta_probe(device_t dev) -{ - struct uart_softc *sc; - - sc = device_get_softc(dev); - sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs); - sc->sc_class = &uart_ns8250_class; - bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas)); - sc->sc_sysdev->bas.bst = mips_bus_space_generic; - sc->sc_sysdev->bas.bsh = MIPS_PHYS_TO_KSEG1(SENTRY5_UART1ADR); - sc->sc_bas.bst = mips_bus_space_generic; - sc->sc_bas.bsh = MIPS_PHYS_TO_KSEG1(SENTRY5_UART1ADR); - return(uart_bus_probe(dev, 0, 0, 0, 0)); -} - -DRIVER_MODULE(uart, obio, uart_malta_driver, uart_devclass, 0, 0); Index: sys/mips/sentry5/uart_cpu_sbusart.c =================================================================== --- sys/mips/sentry5/uart_cpu_sbusart.c +++ /dev/null @@ -1,82 +0,0 @@ -/*- - * Copyright (c) 2006 Wojciech A. Koszek - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $Id$ - */ -/* - * Skeleton of this file was based on respective code for ARM - * code written by Olivier Houchard. - */ -/* - * XXXMIPS: This file is hacked from arm/... . XXXMIPS here means this file is - * experimental and was written for MIPS32 port. - */ -#include "opt_uart.h" - -#include -__FBSDID("$FreeBSD$"); - -#include -#include -#include -#include - -#include - -#include -#include - -#include - -bus_space_tag_t uart_bus_space_io; -bus_space_tag_t uart_bus_space_mem; - -extern struct uart_ops malta_usart_ops; -extern struct bus_space malta_bs_tag; - -int -uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2) -{ - return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0); -} - -int -uart_cpu_getdev(int devtype, struct uart_devinfo *di) -{ - di->ops = uart_getops(&uart_ns8250_class); - di->bas.chan = 0; - di->bas.bst = 0; - di->bas.regshft = 0; - di->bas.rclk = 0; - di->baudrate = 115200; - di->databits = 8; - di->stopbits = 1; - di->parity = UART_PARITY_NONE; - - uart_bus_space_io = MIPS_PHYS_TO_KSEG1(SENTRY5_UART1ADR); - uart_bus_space_mem = mips_bus_space_generic; - di->bas.bsh = MIPS_PHYS_TO_KSEG1(SENTRY5_UART1ADR); - return (0); -}