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Differential D59004

intelspi: add Tiger Lake SPI controller IDs
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Authored by seuros on Aug 19 2026, 7:55 PM.
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imp

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Reviewers
adrian
Commits
rG7988c591e177: intelspi: add Tiger Lake SPI controller IDs
rG2ab3bf1bed79: intelspi: add Tiger Lake SPI controller IDs
rG3ff56f81a1a5: intelspi: add Tiger Lake SPI controller IDs
Summary

Add PCI device IDs for Tiger Lake-generation LPSS peripheral SPI
controllers.

Diff Detail

Repository
rG FreeBSD src repository
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Tests Not Applicable

Event Timeline

seuros created this revision.Aug 19 2026, 7:55 PM
Herald added a subscriber: imp. · View Herald TranscriptAug 19 2026, 7:55 PM
seuros requested review of this revision.Aug 19 2026, 7:55 PM
Harbormaster completed remote builds in B75756: Diff 184386.Aug 19 2026, 7:55 PM
seuros added a parent revision: D59003: intelspi: add Jasper Lake SPI controller IDs.Aug 19 2026, 7:58 PM
seuros added a child revision: D59002: intelspi: add Ice Lake SPI controller IDs.
seuros added a child revision: D59005: intelspi: add Elkhart Lake SPI controller IDs.
seuros retitled this revision from intel/spi: add Tiger Lake SPI controller IDs to intelspi: add Tiger Lake SPI controller IDs.Aug 20 2026, 12:10 PM
seuros removed a child revision: D59002: intelspi: add Ice Lake SPI controller IDs.Aug 20 2026, 3:32 PM
adrian accepted this revision.Aug 21 2026, 3:59 PM
This revision is now accepted and ready to land.Aug 21 2026, 3:59 PM
Closed by commit rG3ff56f81a1a5: intelspi: add Tiger Lake SPI controller IDs (authored by seuros, committed by adrian). · Explain WhyAug 22 2026, 2:44 AM
This revision was automatically updated to reflect the committed changes.
adrian added a commit: rG3ff56f81a1a5: intelspi: add Tiger Lake SPI controller IDs.
ngie added a commit: rG2ab3bf1bed79: intelspi: add Tiger Lake SPI controller IDs.Sep 6 2026, 9:14 PM
ngie added a commit: rG7988c591e177: intelspi: add Tiger Lake SPI controller IDs.

Revision Contents
Changeset List

PathSize
sys/
dev/
intel/
11 lines

Diff 184721

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sys/dev/intel/spi_pci.c

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