Index: head/sys/amd64/amd64/autoconf.c
===================================================================
--- head/sys/amd64/amd64/autoconf.c
+++ head/sys/amd64/amd64/autoconf.c
@@ -100,13 +100,6 @@
 	void *dummy;
 {
 
-	/*
-	 * Enable interrupts on the processor.  The interrupts are still
-	 * disabled in the interrupt controllers until interrupt handlers
-	 * are registered.
-	 */
-	enable_intr();
-
 	/* initialize new bus architecture */
 	root_bus_configure();
 
Index: head/sys/i386/i386/autoconf.c
===================================================================
--- head/sys/i386/i386/autoconf.c
+++ head/sys/i386/i386/autoconf.c
@@ -101,13 +101,6 @@
 	void *dummy;
 {
 
-	/*
-	 * Enable interrupts on the processor.  The interrupts are still
-	 * disabled in the interrupt controllers until interrupt handlers
-	 * are registered.
-	 */
-	enable_intr();
-
 	/* initialize new bus architecture */
 	root_bus_configure();
 
Index: head/sys/x86/x86/intr_machdep.c
===================================================================
--- head/sys/x86/x86/intr_machdep.c
+++ head/sys/x86/x86/intr_machdep.c
@@ -393,6 +393,21 @@
 }
 SYSINIT(intr_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_init, NULL);
 
+static void
+intr_init_final(void *dummy __unused)
+{
+
+	/*
+	 * Enable interrupts on the BSP after all of the interrupt
+	 * controllers are initialized.  Device interrupts are still
+	 * disabled in the interrupt controllers until interrupt
+	 * handlers are registered.  Interrupts are enabled on each AP
+	 * after their first context switch.
+	 */
+	enable_intr();
+}
+SYSINIT(intr_init_final, SI_SUB_INTR, SI_ORDER_ANY, intr_init_final, NULL);
+
 #ifndef DEV_ATPIC
 /* Initialize the two 8259A's to a known-good shutdown state. */
 void