Index: sys/arm/allwinner/a10_clk.h =================================================================== --- sys/arm/allwinner/a10_clk.h +++ sys/arm/allwinner/a10_clk.h @@ -112,7 +112,9 @@ /* AHB_GATING_REG0 */ #define CCM_AHB_GATING_USB0 (1 << 0) #define CCM_AHB_GATING_EHCI0 (1 << 1) +#define CCM_AHB_GATING_OHCI0 (1 << 2) #define CCM_AHB_GATING_EHCI1 (1 << 3) +#define CCM_AHB_GATING_OHCI1 (1 << 4) #define CCM_AHB_GATING_DMA (1 << 6) #define CCM_AHB_GATING_SDMMC0 (1 << 8) #define CCM_AHB_GATING_EMAC (1 << 17) @@ -129,10 +131,13 @@ /* APB1_GATING_REG */ #define CCM_APB1_GATING_TWI (1 << 0) +/* USB */ #define CCM_USB_PHY (1 << 8) -#define CCM_USB0_RESET (1 << 0) -#define CCM_USB1_RESET (1 << 1) -#define CCM_USB2_RESET (1 << 2) +#define CCM_USBPHY0_RESET (1 << 0) +#define CCM_USBPHY1_RESET (1 << 1) +#define CCM_USBPHY2_RESET (1 << 2) +#define CCM_SCLK_GATING_OHCI0 (1 << 6) +#define CCM_SCLK_GATING_OHCI1 (1 << 7) #define CCM_PLL_CFG_ENABLE (1U << 31) #define CCM_PLL_CFG_BYPASS (1U << 30) @@ -221,8 +226,10 @@ #define CCM_CLK_REF_FREQ 24000000U -int a10_clk_usb_activate(void); -int a10_clk_usb_deactivate(void); +int a10_clk_ehci_activate(void); +int a10_clk_ehci_deactivate(void); +int a10_clk_ohci_activate(void); +int a10_clk_ohci_deactivate(void); int a10_clk_emac_activate(void); int a10_clk_gmac_activate(phandle_t); int a10_clk_ahci_activate(void); Index: sys/arm/allwinner/a10_clk.c =================================================================== --- sys/arm/allwinner/a10_clk.c +++ sys/arm/allwinner/a10_clk.c @@ -59,14 +59,27 @@ struct resource *res; bus_space_tag_t bst; bus_space_handle_t bsh; + struct mtx mtx; int pll6_enabled; + int ehci_cnt; + int ohci_cnt; + int usbphy_cnt; + int usb_cnt; }; static struct a10_ccm_softc *a10_ccm_sc = NULL; -#define ccm_read_4(sc, reg) \ +static int a10_clk_usbphy_activate(struct a10_ccm_softc *sc); +static int a10_clk_usbphy_deactivate(struct a10_ccm_softc *sc); +static int a10_clk_usb_activate(struct a10_ccm_softc *sc); +static int a10_clk_usb_deactivate(struct a10_ccm_softc *sc); + +#define CCM_LOCK(sc) mtx_lock(&(sc)->mtx); +#define CCM_UNLOCK(sc) mtx_unlock(&(sc)->mtx); +#define CCM_LOCK_ASSERT(sc) mtx_assert(&(sc)->mtx, MA_OWNED) +#define ccm_read_4(sc, reg) \ bus_space_read_4((sc)->bst, (sc)->bsh, (reg)) -#define ccm_write_4(sc, reg, val) \ +#define ccm_write_4(sc, reg, val) \ bus_space_write_4((sc)->bst, (sc)->bsh, (reg), (val)) static int @@ -102,6 +115,8 @@ sc->bst = rman_get_bustag(sc->res); sc->bsh = rman_get_bushandle(sc->res); + mtx_init(&sc->mtx, "a10_ccm", NULL, MTX_DEF); + a10_ccm_sc = sc; return (0); @@ -125,7 +140,7 @@ BUS_PASS_TIMER + BUS_PASS_ORDER_MIDDLE); int -a10_clk_usb_activate(void) +a10_clk_ehci_activate(void) { struct a10_ccm_softc *sc = a10_ccm_sc; uint32_t reg_value; @@ -133,26 +148,26 @@ if (sc == NULL) return (ENXIO); - /* Gating AHB clock for USB */ - reg_value = ccm_read_4(sc, CCM_AHB_GATING0); - reg_value |= CCM_AHB_GATING_USB0; /* AHB clock gate usb0 */ - reg_value |= CCM_AHB_GATING_EHCI0; /* AHB clock gate ehci0 */ - reg_value |= CCM_AHB_GATING_EHCI1; /* AHB clock gate ehci1 */ - ccm_write_4(sc, CCM_AHB_GATING0, reg_value); + CCM_LOCK(sc); + + if (++sc->ehci_cnt == 1) { + /* Gating AHB clock for USB */ + reg_value = ccm_read_4(sc, CCM_AHB_GATING0); + reg_value |= CCM_AHB_GATING_EHCI0; /* AHB clock gate ehci0 */ + reg_value |= CCM_AHB_GATING_EHCI1; /* AHB clock gate ehci1 */ + ccm_write_4(sc, CCM_AHB_GATING0, reg_value); + } + + a10_clk_usb_activate(sc); + a10_clk_usbphy_activate(sc); - /* Enable clock for USB */ - reg_value = ccm_read_4(sc, CCM_USB_CLK); - reg_value |= CCM_USB_PHY; /* USBPHY */ - reg_value |= CCM_USB0_RESET; /* disable reset for USB0 */ - reg_value |= CCM_USB1_RESET; /* disable reset for USB1 */ - reg_value |= CCM_USB2_RESET; /* disable reset for USB2 */ - ccm_write_4(sc, CCM_USB_CLK, reg_value); + CCM_UNLOCK(sc); return (0); } int -a10_clk_usb_deactivate(void) +a10_clk_ehci_deactivate(void) { struct a10_ccm_softc *sc = a10_ccm_sc; uint32_t reg_value; @@ -160,20 +175,172 @@ if (sc == NULL) return (ENXIO); - /* Disable clock for USB */ - reg_value = ccm_read_4(sc, CCM_USB_CLK); - reg_value &= ~CCM_USB_PHY; /* USBPHY */ - reg_value &= ~CCM_USB0_RESET; /* reset for USB0 */ - reg_value &= ~CCM_USB1_RESET; /* reset for USB1 */ - reg_value &= ~CCM_USB2_RESET; /* reset for USB2 */ - ccm_write_4(sc, CCM_USB_CLK, reg_value); + CCM_LOCK(sc); - /* Disable gating AHB clock for USB */ - reg_value = ccm_read_4(sc, CCM_AHB_GATING0); - reg_value &= ~CCM_AHB_GATING_USB0; /* disable AHB clock gate usb0 */ - reg_value &= ~CCM_AHB_GATING_EHCI0; /* disable AHB clock gate ehci0 */ - reg_value &= ~CCM_AHB_GATING_EHCI1; /* disable AHB clock gate ehci1 */ - ccm_write_4(sc, CCM_AHB_GATING0, reg_value); + if (--sc->ehci_cnt == 0) { + /* Disable gating AHB clock for USB */ + reg_value = ccm_read_4(sc, CCM_AHB_GATING0); + reg_value &= ~CCM_AHB_GATING_EHCI0; /* disable AHB clock gate ehci0 */ + reg_value &= ~CCM_AHB_GATING_EHCI1; /* disable AHB clock gate ehci1 */ + ccm_write_4(sc, CCM_AHB_GATING0, reg_value); + } + + a10_clk_usb_deactivate(sc); + a10_clk_usbphy_deactivate(sc); + + CCM_UNLOCK(sc); + + return (0); +} + +int +a10_clk_ohci_activate(void) +{ + struct a10_ccm_softc *sc = a10_ccm_sc; + uint32_t reg_value; + + if (sc == NULL) + return (ENXIO); + + CCM_LOCK(sc); + + if (++sc->ohci_cnt == 1) { + /* Gating AHB clock for USB */ + reg_value = ccm_read_4(sc, CCM_AHB_GATING0); + reg_value |= CCM_AHB_GATING_OHCI0; /* AHB clock gate ohci0 */ + reg_value |= CCM_AHB_GATING_OHCI1; /* AHB clock gate ohci1 */ + ccm_write_4(sc, CCM_AHB_GATING0, reg_value); + + /* Enable clock for USB */ + reg_value = ccm_read_4(sc, CCM_USB_CLK); + reg_value |= CCM_SCLK_GATING_OHCI0; + reg_value |= CCM_SCLK_GATING_OHCI1; + ccm_write_4(sc, CCM_USB_CLK, reg_value); + } + + a10_clk_usb_activate(sc); + a10_clk_usbphy_activate(sc); + + CCM_UNLOCK(sc); + + return (0); +} + +int +a10_clk_ohci_deactivate(void) +{ + struct a10_ccm_softc *sc = a10_ccm_sc; + uint32_t reg_value; + + if (sc == NULL) + return (ENXIO); + + CCM_LOCK(sc); + + if (--sc->ohci_cnt == 0) { + /* Disable clock for USB */ + reg_value = ccm_read_4(sc, CCM_USB_CLK); + reg_value &= ~CCM_SCLK_GATING_OHCI0; + reg_value &= ~CCM_SCLK_GATING_OHCI1; + ccm_write_4(sc, CCM_USB_CLK, reg_value); + + /* Disable gating AHB clock for USB */ + reg_value = ccm_read_4(sc, CCM_AHB_GATING0); + reg_value &= ~CCM_AHB_GATING_OHCI0; /* disable AHB clock gate ohci0 */ + reg_value &= ~CCM_AHB_GATING_OHCI1; /* disable AHB clock gate ohci1 */ + ccm_write_4(sc, CCM_AHB_GATING0, reg_value); + } + + a10_clk_usb_deactivate(sc); + a10_clk_usbphy_deactivate(sc); + + CCM_UNLOCK(sc); + + return (0); +} + +static int +a10_clk_usb_activate(struct a10_ccm_softc *sc) +{ + uint32_t reg_value; + + if (sc == NULL) + return (ENXIO); + + CCM_LOCK_ASSERT(sc); + + if (++sc->usb_cnt == 1) { + /* Gating AHB clock for USB */ + reg_value = ccm_read_4(sc, CCM_AHB_GATING0); + reg_value |= CCM_AHB_GATING_USB0; /* AHB clock gate usb0 */ + ccm_write_4(sc, CCM_AHB_GATING0, reg_value); + } + + return (0); +} + +static int +a10_clk_usb_deactivate(struct a10_ccm_softc *sc) +{ + uint32_t reg_value; + + if (sc == NULL) + return (ENXIO); + + CCM_LOCK_ASSERT(sc); + + if (--sc->usb_cnt == 0) { + /* Disable gating AHB clock for USB */ + reg_value = ccm_read_4(sc, CCM_AHB_GATING0); + reg_value &= ~CCM_AHB_GATING_USB0; /* disable AHB clock gate usb0 */ + ccm_write_4(sc, CCM_AHB_GATING0, reg_value); + } + + return (0); +} + +static int +a10_clk_usbphy_activate(struct a10_ccm_softc *sc) +{ + uint32_t reg_value; + + if (sc == NULL) + return (ENXIO); + + CCM_LOCK_ASSERT(sc); + + if (++sc->usbphy_cnt == 1) { + /* Enable clock for USB */ + reg_value = ccm_read_4(sc, CCM_USB_CLK); + reg_value |= CCM_USB_PHY; /* USBPHY */ + reg_value |= CCM_USBPHY0_RESET; /* disable reset for USBPHY0 */ + reg_value |= CCM_USBPHY1_RESET; /* disable reset for USBPHY1 */ + reg_value |= CCM_USBPHY2_RESET; /* disable reset for USBPHY2 */ + ccm_write_4(sc, CCM_USB_CLK, reg_value); + } + + return (0); +} + +static int +a10_clk_usbphy_deactivate(struct a10_ccm_softc *sc) +{ + uint32_t reg_value; + + if (sc == NULL) + return (ENXIO); + + CCM_LOCK_ASSERT(sc); + + if (--sc->usbphy_cnt == 0) { + /* Disable clock for USB */ + reg_value = ccm_read_4(sc, CCM_USB_CLK); + reg_value &= ~CCM_USB_PHY; /* USBPHY */ + reg_value &= ~CCM_USBPHY0_RESET; /* reset for USBPHY0 */ + reg_value &= ~CCM_USBPHY1_RESET; /* reset for USBPHY1 */ + reg_value &= ~CCM_USBPHY2_RESET; /* reset for USBPHY2 */ + ccm_write_4(sc, CCM_USB_CLK, reg_value); + } return (0); } Index: sys/arm/allwinner/a10_ehci.c =================================================================== --- sys/arm/allwinner/a10_ehci.c +++ sys/arm/allwinner/a10_ehci.c @@ -188,7 +188,7 @@ sc->sc_flags |= EHCI_SCFLG_DONTRESET; /* Enable clock for USB */ - a10_clk_usb_activate(); + a10_clk_ehci_activate(); /* Give power to USB */ GPIO_PIN_SETFLAGS(sc_gpio_dev, GPIO_USB2_PWR, GPIO_PIN_OUTPUT); @@ -282,7 +282,7 @@ A10_WRITE_4(sc, SW_USB_PMU_IRQ_ENABLE, reg_value); /* Disable clock for USB */ - a10_clk_usb_deactivate(); + a10_clk_ehci_deactivate(); return (0); } Index: sys/arm/allwinner/aw_ohci.c =================================================================== --- /dev/null +++ sys/arm/allwinner/aw_ohci.c @@ -0,0 +1,122 @@ +/*- + * Copyright (c) 2016 Emmanuel Vadot + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include + +#include "generic_ohci_if.h" + +static struct ofw_compat_data compat_data[] = { + {"allwinner,sun4i-a10-ohci", 1}, + {"allwinner,sun7i-a20-ohci", 1}, + {NULL, 0} +}; + +static int +aw_ohci_probe(device_t dev) +{ + + if (!ofw_bus_status_okay(dev)) + return (ENXIO); + + if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) + return (ENXIO); + + device_set_desc(dev, "Allwinner OHCI Controller"); + + return (BUS_PROBE_DEFAULT); +} + +static int +aw_ohci_init(device_t dev) +{ + /* Enable USB clock */ +#if defined(SOC_ALLWINNER_A10) || defined(SOC_ALLWINNER_A20) + if (a10_clk_ohci_activate() == 0) + return (0); +#endif + + return (ENXIO); +} + +static int +aw_ohci_deinit(device_t dev) +{ +#if defined(SOC_ALLWINNER_A10) || defined(SOC_ALLWINNER_A20) + if (a10_clk_ohci_deactivate() == 0) + return (0); +#endif + + return (ENXIO); +} + +static device_method_t aw_ohci_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, aw_ohci_probe), + + /* generic ohci interface */ + DEVMETHOD(generic_ohci_init, aw_ohci_init), + DEVMETHOD(generic_ohci_deinit, aw_ohci_deinit), + + DEVMETHOD_END +}; + +extern driver_t ohci_driver; + +static devclass_t aw_ohci_devclass; + +DEFINE_CLASS_1(ohci, aw_ohci_driver, aw_ohci_methods, + sizeof(struct ohci_softc), ohci_driver); +DRIVER_MODULE(aw_ohci, simplebus, aw_ohci_driver, aw_ohci_devclass, 0, 0); + +MODULE_DEPEND(aw_ohci, generic_ohci, 1, 1, 1); Index: sys/arm/allwinner/files.allwinner =================================================================== --- sys/arm/allwinner/files.allwinner +++ sys/arm/allwinner/files.allwinner @@ -10,6 +10,7 @@ arm/allwinner/a10_gpio.c optional gpio arm/allwinner/a10_mmc.c optional mmc arm/allwinner/a10_sramc.c standard +arm/allwinner/aw_ohci.c optional ohci generic_ohci arm/allwinner/aw_rtc.c standard arm/allwinner/aw_wdog.c standard arm/allwinner/a20/a20_cpu_cfg.c standard Index: sys/arm/conf/A10 =================================================================== --- sys/arm/conf/A10 +++ sys/arm/conf/A10 @@ -88,7 +88,8 @@ #options USB_REQ_DEBUG #options USB_VERBOSE #device uhci -#device ohci +device ohci +device generic_ohci device ehci device umass Index: sys/arm/conf/A20 =================================================================== --- sys/arm/conf/A20 +++ sys/arm/conf/A20 @@ -97,7 +97,8 @@ #options USB_REQ_DEBUG #options USB_VERBOSE #device uhci -#device ohci +device ohci +device generic_ohci device ehci device umass Index: sys/conf/files =================================================================== --- sys/conf/files +++ sys/conf/files @@ -2569,6 +2569,8 @@ dev/usb/controller/dwc_otg_fdt.c optional dwcotg fdt dev/usb/controller/ehci.c optional ehci dev/usb/controller/ehci_pci.c optional ehci pci +dev/usb/controller/generic_ohci.c optional ohci generic_ohci +dev/usb/controller/generic_ohci_if.m optional ohci generic_ohci dev/usb/controller/ohci.c optional ohci dev/usb/controller/ohci_pci.c optional ohci pci dev/usb/controller/uhci.c optional uhci Index: sys/dev/usb/controller/generic_ohci.c =================================================================== --- /dev/null +++ sys/dev/usb/controller/generic_ohci.c @@ -0,0 +1,227 @@ +/*- + * Copyright (c) 2006 M. Warner Losh. All rights reserved. + * Copyright (c) 2016 Emmanuel Vadot + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/* + * Generic OHCI driver based on AT91 OHCI + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "generic_ohci_if.h" + +static int generic_ohci_detach(device_t); + +static int +generic_ohci_probe(device_t dev) +{ + + return (ENXIO); + /* No ready to use as the OHCI clock must be enabled */ +#ifdef notyet + if (!ofw_bus_status_okay(dev)) + return (ENXIO); + + if (!ofw_bus_is_compatible(dev, "generic-ohci")) + return (ENXIO); + + device_set_desc(dev, "Generic OHCI Controller"); + + return (BUS_PROBE_DEFAULT); +#endif +} + +static int +generic_ohci_attach(device_t dev) +{ + ohci_softc_t *sc; + int err, rid; + + sc = device_get_softc(dev); + sc->sc_bus.parent = dev; + sc->sc_bus.devices = sc->sc_devices; + sc->sc_bus.devices_max = OHCI_MAX_DEVICES; + sc->sc_bus.dma_bits = 32; + + /* get all DMA memory */ + if (usb_bus_mem_alloc_all(&sc->sc_bus, + USB_GET_DMA_TAG(dev), &ohci_iterate_hw_softc)) { + return (ENOMEM); + } + + rid = 0; + sc->sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, + &rid, RF_ACTIVE); + if (!(sc->sc_io_res)) { + err = ENOMEM; + goto error; + } + + sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); + sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); + sc->sc_io_size = rman_get_size(sc->sc_io_res); + + rid = 0; + sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, + RF_ACTIVE); + if (!(sc->sc_irq_res)) { + goto error; + } + sc->sc_bus.bdev = device_add_child(dev, "usbus", -1); + if (!(sc->sc_bus.bdev)) { + goto error; + } + device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); + + strlcpy(sc->sc_vendor, "Generic", sizeof(sc->sc_vendor)); + + err = bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, + NULL, (driver_intr_t *)ohci_interrupt, sc, &sc->sc_intr_hdl); + if (err) { + sc->sc_intr_hdl = NULL; + goto error; + } + + if (GENERIC_OHCI_INIT(dev) != 0) { + err = ENXIO; + goto error; + } + + err = ohci_init(sc); + if (!err) { + err = device_probe_and_attach(sc->sc_bus.bdev); + } + if (err) { + goto error; + } + + return (0); +error: + generic_ohci_detach(dev); + return (ENXIO); +} + +static int +generic_ohci_detach(device_t dev) +{ + ohci_softc_t *sc = device_get_softc(dev); + device_t bdev; + int err; + + if (sc->sc_bus.bdev) { + bdev = sc->sc_bus.bdev; + device_detach(bdev); + device_delete_child(dev, bdev); + } + + /* during module unload there are lots of children leftover */ + device_delete_children(dev); + + /* + * Put the controller into reset, then disable clocks and do + * the MI tear down. We have to disable the clocks/hardware + * after we do the rest of the teardown. We also disable the + * clocks in the opposite order we acquire them, but that + * doesn't seem to be absolutely necessary. We free up the + * clocks after we disable them, so the system could, in + * theory, reuse them. + */ + bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, OHCI_CONTROL, 0); + + if (sc->sc_irq_res && sc->sc_intr_hdl) { + /* + * only call ohci_detach() after ohci_init() + */ + ohci_detach(sc); + + err = bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_intr_hdl); + sc->sc_intr_hdl = NULL; + } + if (sc->sc_irq_res) { + bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res); + sc->sc_irq_res = NULL; + } + if (sc->sc_io_res) { + bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_io_res); + sc->sc_io_res = NULL; + } + usb_bus_mem_free_all(&sc->sc_bus, &ohci_iterate_hw_softc); + + if (GENERIC_OHCI_DEINIT(dev) != 0) + return (ENXIO); + + return (0); +} + +static device_method_t ohci_methods[] = { + /* Device interface */ + /* DEVMETHOD(device_probe, generic_ohci_probe), */ + DEVMETHOD(device_attach, generic_ohci_attach), + DEVMETHOD(device_detach, generic_ohci_detach), + + DEVMETHOD(device_suspend, bus_generic_suspend), + DEVMETHOD(device_resume, bus_generic_resume), + DEVMETHOD(device_shutdown, bus_generic_shutdown), + + DEVMETHOD_END +}; + +driver_t ohci_driver = { + .name = "ohci", + .methods = ohci_methods, + .size = sizeof(ohci_softc_t), +}; + +static devclass_t ohci_devclass; + +DRIVER_MODULE(ohci, simplebus, ohci_driver, ohci_devclass, 0, 0); +MODULE_DEPEND(ohci, usb, 1, 1, 1); Index: sys/dev/usb/controller/generic_ohci_if.m =================================================================== --- /dev/null +++ sys/dev/usb/controller/generic_ohci_if.m @@ -0,0 +1,60 @@ +#- +# Copyright (c) 2016 Emmanuel Vadot +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +# SUCH DAMAGE. +# +# $FreeBSD$ +# + +INTERFACE generic_ohci; + +CODE { + static int + generic_ohci_default_init(device_t dev) + { + return (0); + } + + static int + generic_ohci_default_deinit(device_t dev) + { + return (0); + } +}; + +HEADER { +}; + +# +# Initialize the SoC bits +# +METHOD int init { + device_t dev; +} DEFAULT generic_ohci_default_init; + +# +# Deinitialize the SoC bits +# +METHOD int deinit { + device_t dev; +} DEFAULT generic_ohci_default_deinit;