diff --git a/sys/arm64/arm64/cpufunc_asm.S b/sys/arm64/arm64/cpufunc_asm.S
--- a/sys/arm64/arm64/cpufunc_asm.S
+++ b/sys/arm64/arm64/cpufunc_asm.S
@@ -89,22 +89,6 @@
 	ret
 END(arm64_nullop)
 
-/*
- * Generic functions to read/modify/write the internal coprocessor registers
- */
-
-ENTRY(arm64_tlb_flushID)
-	dsb	ishst
-#ifdef SMP
-	tlbi	vmalle1is
-#else
-	tlbi	vmalle1
-#endif
-	dsb	ish
-	isb
-	ret
-END(arm64_tlb_flushID)
-
 /*
  * void arm64_dcache_wb_range(void *, vm_size_t)
  */
diff --git a/sys/arm64/include/cpufunc.h b/sys/arm64/include/cpufunc.h
--- a/sys/arm64/include/cpufunc.h
+++ b/sys/arm64/include/cpufunc.h
@@ -189,8 +189,6 @@
 #define	cpu_nullop()			arm64_nullop()
 #define	cpufunc_nullop()		arm64_nullop()
 
-#define	cpu_tlb_flushID()		arm64_tlb_flushID()
-
 #define	cpu_dcache_wbinv_range(a, s)	arm64_dcache_wbinv_range((a), (s))
 #define	cpu_dcache_inv_range(a, s)	arm64_dcache_inv_range((a), (s))
 #define	cpu_dcache_wb_range(a, s)	arm64_dcache_wb_range((a), (s))
@@ -201,7 +199,6 @@
 #define cpu_icache_sync_range_checked(a, s) arm64_icache_sync_range_checked((a), (s))
 
 void arm64_nullop(void);
-void arm64_tlb_flushID(void);
 void arm64_dic_idc_icache_sync_range(void *, vm_size_t);
 void arm64_idc_aliasing_icache_sync_range(void *, vm_size_t);
 void arm64_aliasing_icache_sync_range(void *, vm_size_t);