diff --git a/sys/arm/nvidia/as3722.c b/sys/arm/nvidia/as3722.c
--- a/sys/arm/nvidia/as3722.c
+++ b/sys/arm/nvidia/as3722.c
@@ -311,10 +311,10 @@
 	rv = as3722_regulator_attach(sc, node);
 	if (rv != 0)
 		goto fail;
-	rv = as3722_gpio_attach(sc, node);
+	rv = as3722_rtc_attach(sc, node);
 	if (rv != 0)
 		goto fail;
-	rv = as3722_rtc_attach(sc, node);
+	rv = as3722_gpio_attach(sc, node);
 	if (rv != 0)
 		goto fail;
 
diff --git a/sys/arm/nvidia/as3722_gpio.c b/sys/arm/nvidia/as3722_gpio.c
--- a/sys/arm/nvidia/as3722_gpio.c
+++ b/sys/arm/nvidia/as3722_gpio.c
@@ -544,9 +544,6 @@
 	sc->gpio_pins = malloc(sizeof(struct as3722_gpio_pin *) *
 	    sc->gpio_npins, M_AS3722_GPIO, M_WAITOK | M_ZERO);
 
-	sc->gpio_busdev = gpiobus_attach_bus(sc->dev);
-	if (sc->gpio_busdev == NULL)
-		return (ENXIO);
 	for (i = 0; i < sc->gpio_npins; i++) {
 		sc->gpio_pins[i] = malloc(sizeof(struct as3722_gpio_pin),
 		    M_AS3722_GPIO, M_WAITOK | M_ZERO);
@@ -563,5 +560,10 @@
 			    sc->gpio_pins[i]->pin_name);
 		}
 	}
+
+	sc->gpio_busdev = gpiobus_attach_bus(sc->dev);
+	if (sc->gpio_busdev == NULL)
+		return (ENXIO);
+
 	return (0);
 }
diff --git a/sys/arm64/apple/apple_pinctrl.c b/sys/arm64/apple/apple_pinctrl.c
--- a/sys/arm64/apple/apple_pinctrl.c
+++ b/sys/arm64/apple/apple_pinctrl.c
@@ -161,6 +161,13 @@
 		goto error;
 	}
 
+	if (OF_hasprop(node, "interrupt-controller")) {
+		sc->sc_irqs = mallocarray(sc->sc_ngpios,
+		    sizeof(*sc->sc_irqs), M_DEVBUF, M_ZERO | M_WAITOK);
+		intr_pic_register(dev,
+		    OF_xref_from_node(ofw_bus_get_node(dev)));
+	}
+
 	sc->sc_busdev = gpiobus_attach_bus(dev);
 	if (sc->sc_busdev == NULL) {
 		device_printf(dev, "failed to attach gpiobus\n");
@@ -170,13 +177,6 @@
 	fdt_pinctrl_register(dev, "pinmux");
 	fdt_pinctrl_configure_tree(dev);
 
-	if (!OF_hasprop(node, "interrupt-controller"))
-		return (0);
-
-	sc->sc_irqs = mallocarray(sc->sc_ngpios,
-	    sizeof(*sc->sc_irqs), M_DEVBUF, M_ZERO | M_WAITOK);
-	intr_pic_register(dev, OF_xref_from_node(ofw_bus_get_node(dev)));
-
 	return (0);
 error:
 	mtx_destroy(&sc->sc_mtx);
diff --git a/sys/arm64/nvidia/tegra210/max77620.c b/sys/arm64/nvidia/tegra210/max77620.c
--- a/sys/arm64/nvidia/tegra210/max77620.c
+++ b/sys/arm64/nvidia/tegra210/max77620.c
@@ -415,11 +415,11 @@
 	rv = max77620_regulator_attach(sc, node);
 	if (rv != 0)
 		goto fail;
-	rv = max77620_gpio_attach(sc, node);
+	rv = max77620_rtc_create(sc, node);
 	if (rv != 0)
 		goto fail;
 
-	rv = max77620_rtc_create(sc, node);
+	rv = max77620_gpio_attach(sc, node);
 	if (rv != 0)
 		goto fail;
 
diff --git a/sys/arm64/nvidia/tegra210/max77620_gpio.c b/sys/arm64/nvidia/tegra210/max77620_gpio.c
--- a/sys/arm64/nvidia/tegra210/max77620_gpio.c
+++ b/sys/arm64/nvidia/tegra210/max77620_gpio.c
@@ -672,10 +672,6 @@
 
 	sx_init(&sc->gpio_lock, "MAX77620 GPIO lock");
 
-	sc->gpio_busdev = gpiobus_attach_bus(sc->dev);
-	if (sc->gpio_busdev == NULL)
-		return (ENXIO);
-
 	rv = RD1(sc, MAX77620_REG_PUE_GPIO, &sc->gpio_reg_pue);
 	if (rv != 0) {
 		device_printf(sc->dev, "Cannot read PUE_GPIO register\n");
@@ -708,5 +704,9 @@
 		pin->reg = MAX77620_REG_GPIO0 + i;
 	}
 
+	sc->gpio_busdev = gpiobus_attach_bus(sc->dev);
+	if (sc->gpio_busdev == NULL)
+		return (ENXIO);
+
 	return (0);
 }
diff --git a/sys/arm64/rockchip/rk_gpio.c b/sys/arm64/rockchip/rk_gpio.c
--- a/sys/arm64/rockchip/rk_gpio.c
+++ b/sys/arm64/rockchip/rk_gpio.c
@@ -362,12 +362,6 @@
 		return (ENXIO);
 	}
 
-	sc->sc_busdev = gpiobus_attach_bus(dev);
-	if (sc->sc_busdev == NULL) {
-		rk_gpio_detach(dev);
-		return (ENXIO);
-	}
-
 	/* Set the cached value to unknown */
 	for (i = 0; i < RK_GPIO_MAX_PINS; i++)
 		sc->pin_cached[i].is_gpio = 2;
@@ -377,6 +371,12 @@
 	sc->swporta_ddr = rk_gpio_read_4(sc, RK_GPIO_SWPORTA_DDR);
 	RK_GPIO_UNLOCK(sc);
 
+	sc->sc_busdev = gpiobus_attach_bus(dev);
+	if (sc->sc_busdev == NULL) {
+		rk_gpio_detach(dev);
+		return (ENXIO);
+	}
+
 	return (0);
 }
 
diff --git a/sys/dev/gpio/gpiobus.c b/sys/dev/gpio/gpiobus.c
--- a/sys/dev/gpio/gpiobus.c
+++ b/sys/dev/gpio/gpiobus.c
@@ -292,6 +292,11 @@
 		sbuf_printf(sb, "%d", range_start);
 }
 
+/*
+ * Attach a gpiobus child.
+ * Note that the controller is expected
+ * to be fully initialized at this point.
+ */
 device_t
 gpiobus_attach_bus(device_t dev)
 {
diff --git a/sys/dev/gpio/pl061.h b/sys/dev/gpio/pl061.h
--- a/sys/dev/gpio/pl061.h
+++ b/sys/dev/gpio/pl061.h
@@ -46,6 +46,7 @@
 	struct resource		*sc_mem_res;
 	struct resource		*sc_irq_res;
 	void			*sc_irq_hdlr;
+	intptr_t		sc_xref;
 	int			sc_mem_rid;
 	int			sc_irq_rid;
 	struct pl061_pin_irqsrc sc_isrcs[PL061_NUM_GPIO];
diff --git a/sys/dev/gpio/pl061.c b/sys/dev/gpio/pl061.c
--- a/sys/dev/gpio/pl061.c
+++ b/sys/dev/gpio/pl061.c
@@ -487,14 +487,21 @@
 		}
 	}
 
+	mtx_init(&sc->sc_mtx, device_get_nameunit(dev), "pl061", MTX_SPIN);
+
+	if (sc->sc_xref != 0 && !intr_pic_register(dev, sc->sc_xref)) {
+		device_printf(dev, "couldn't register PIC\n");
+		PL061_LOCK_DESTROY(sc);
+		goto free_isrc;
+	}
+
 	sc->sc_busdev = gpiobus_attach_bus(dev);
 	if (sc->sc_busdev == NULL) {
 		device_printf(dev, "couldn't attach gpio bus\n");
+		PL061_LOCK_DESTROY(sc);
 		goto free_isrc;
 	}
 
-	mtx_init(&sc->sc_mtx, device_get_nameunit(dev), "pl061", MTX_SPIN);
-
 	return (0);
 
 free_isrc:
@@ -503,6 +510,7 @@
 	 * for (irq = 0; irq < PL061_NUM_GPIO; irq++)
 	 *	intr_isrc_deregister(PIC_INTR_ISRC(sc, irq));
 	*/
+	bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_irq_hdlr);
 	bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irq_rid,
 	    sc->sc_irq_res);
 free_pic:
diff --git a/sys/dev/gpio/pl061_acpi.c b/sys/dev/gpio/pl061_acpi.c
--- a/sys/dev/gpio/pl061_acpi.c
+++ b/sys/dev/gpio/pl061_acpi.c
@@ -67,19 +67,12 @@
 static int
 pl061_acpi_attach(device_t dev)
 {
-	int error;
+	struct pl061_softc *sc;
 
-	error = pl061_attach(dev);
-	if (error != 0)
-		return (error);
+	sc = device_get_softc(dev);
+	sc->sc_xref = ACPI_GPIO_XREF;
 
-	if (!intr_pic_register(dev, ACPI_GPIO_XREF)) {
-		device_printf(dev, "couldn't register PIC\n");
-		pl061_detach(dev);
-		error = ENXIO;
-	}
-
-	return (error);
+	return (pl061_attach(dev));
 }
 
 static device_method_t pl061_acpi_methods[] = {
diff --git a/sys/dev/gpio/pl061_fdt.c b/sys/dev/gpio/pl061_fdt.c
--- a/sys/dev/gpio/pl061_fdt.c
+++ b/sys/dev/gpio/pl061_fdt.c
@@ -61,19 +61,12 @@
 static int
 pl061_fdt_attach(device_t dev)
 {
-	int error;
+	struct pl061_softc *sc;
 
-	error = pl061_attach(dev);
-	if (error != 0)
-		return (error);
+	sc = device_get_softc(dev);
+	sc->sc_xref = OF_xref_from_node(ofw_bus_get_node(dev));
 
-	if (!intr_pic_register(dev, OF_xref_from_node(ofw_bus_get_node(dev)))) {
-		device_printf(dev, "couldn't register PIC\n");
-		pl061_detach(dev);
-		error = ENXIO;
-	}
-
-	return (error);
+	return (pl061_attach(dev));
 }
 
 static device_method_t pl061_fdt_methods[] = {
diff --git a/sys/dev/gpio/qoriq_gpio.c b/sys/dev/gpio/qoriq_gpio.c
--- a/sys/dev/gpio/qoriq_gpio.c
+++ b/sys/dev/gpio/qoriq_gpio.c
@@ -369,11 +369,6 @@
 	for (i = 0; i <= MAXPIN; i++)
 		sc->sc_pins[i].gp_caps = DEFAULT_CAPS;
 
-	sc->busdev = gpiobus_attach_bus(dev);
-	if (sc->busdev == NULL) {
-		qoriq_gpio_detach(dev);
-		return (ENOMEM);
-	}
 	/*
 	 * Enable the GPIO Input Buffer for all GPIOs.
 	 * This is safe on devices without a GPIBE register, because those
@@ -382,6 +377,12 @@
 	if (ofw_bus_is_compatible(dev, "fsl,qoriq-gpio"))
 		bus_write_4(sc->sc_mem, GPIO_GPIBE, 0xffffffff);
 
+	sc->busdev = gpiobus_attach_bus(dev);
+	if (sc->busdev == NULL) {
+		qoriq_gpio_detach(dev);
+		return (ENOMEM);
+	}
+
 	OF_device_register_xref(OF_xref_from_node(ofw_bus_get_node(dev)), dev);
 
 	return (0);