Index: head/sys/dev/sfxge/common/efsys.h
===================================================================
--- head/sys/dev/sfxge/common/efsys.h
+++ head/sys/dev/sfxge/common/efsys.h
@@ -288,7 +288,6 @@
 #define	EFSYS_OPT_QSTATS 1
 #define	EFSYS_OPT_FILTER 1
 #define	EFSYS_OPT_RX_SCATTER 0
-#define	EFSYS_OPT_RX_HDR_SPLIT 0
 
 #define	EFSYS_OPT_EV_PREFETCH 0
 
Index: head/sys/dev/sfxge/common/efx.h
===================================================================
--- head/sys/dev/sfxge/common/efx.h
+++ head/sys/dev/sfxge/common/efx.h
@@ -1817,15 +1817,6 @@
 efx_rx_fini(
 	__in		efx_nic_t *enp);
 
-#if EFSYS_OPT_RX_HDR_SPLIT
-	__checkReturn	efx_rc_t
-efx_rx_hdr_split_enable(
-	__in		efx_nic_t *enp,
-	__in		unsigned int hdr_buf_size,
-	__in		unsigned int pld_buf_size);
-
-#endif	/* EFSYS_OPT_RX_HDR_SPLIT */
-
 #if EFSYS_OPT_RX_SCATTER
 	__checkReturn	efx_rc_t
 efx_rx_scatter_enable(
Index: head/sys/dev/sfxge/common/efx_check.h
===================================================================
--- head/sys/dev/sfxge/common/efx_check.h
+++ head/sys/dev/sfxge/common/efx_check.h
@@ -347,12 +347,9 @@
 # endif
 #endif /* EFSYS_OPT_QSTATS */
 
-/* Support receive header split */
-#if EFSYS_OPT_RX_HDR_SPLIT
-# if !(EFSYS_OPT_FALCON || EFSYS_OPT_SIENA || \
-	EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD)
-#  error "RX_HDR_SPLIT requires FALCON or SIENA or HUNTINGTON or MEDFORD"
-# endif
+/* Obsolete option */
+#ifdef EFSYS_OPT_RX_HDR_SPLIT
+# error "RX_HDR_SPLIT is obsolete and is not supported"
 #endif /* EFSYS_OPT_RX_HDR_SPLIT */
 
 /* Support receive scaling (RSS) */
Index: head/sys/dev/sfxge/common/efx_ev.c
===================================================================
--- head/sys/dev/sfxge/common/efx_ev.c
+++ head/sys/dev/sfxge/common/efx_ev.c
@@ -498,7 +498,7 @@
 		EFX_EV_QSTAT_INCR(eep, EV_RX_FRM_TRUNC);
 		(*flagsp) |= EFX_DISCARD;
 
-#if (EFSYS_OPT_RX_HDR_SPLIT || EFSYS_OPT_RX_SCATTER)
+#if EFSYS_OPT_RX_SCATTER
 		/*
 		 * Lookout for payload queue ran dry errors and ignore them.
 		 *
@@ -513,7 +513,7 @@
 		    (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_JUMBO_CONT) == 0) &&
 		    (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_BYTE_CNT) == 0))
 			ignore = B_TRUE;
-#endif	/* EFSYS_OPT_RX_HDR_SPLIT || EFSYS_OPT_RX_SCATTER */
+#endif	/* EFSYS_OPT_RX_SCATTER */
 	}
 
 	if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_ETH_CRC_ERR) != 0) {
@@ -574,10 +574,10 @@
 	uint32_t size;
 	uint32_t label;
 	boolean_t ok;
-#if (EFSYS_OPT_RX_HDR_SPLIT || EFSYS_OPT_RX_SCATTER)
+#if EFSYS_OPT_RX_SCATTER
 	boolean_t sop;
 	boolean_t jumbo_cont;
-#endif	/* EFSYS_OPT_RX_HDR_SPLIT || EFSYS_OPT_RX_SCATTER */
+#endif	/* EFSYS_OPT_RX_SCATTER */
 	uint32_t hdr_type;
 	boolean_t is_v6;
 	uint16_t flags;
@@ -592,10 +592,10 @@
 	label = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_Q_LABEL);
 	ok = (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_PKT_OK) != 0);
 
-#if (EFSYS_OPT_RX_HDR_SPLIT || EFSYS_OPT_RX_SCATTER)
+#if EFSYS_OPT_RX_SCATTER
 	sop = (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_SOP) != 0);
 	jumbo_cont = (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_JUMBO_CONT) != 0);
-#endif	/* EFSYS_OPT_RX_HDR_SPLIT || EFSYS_OPT_RX_SCATTER */
+#endif	/* EFSYS_OPT_RX_SCATTER */
 
 	hdr_type = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_HDR_TYPE);
 
@@ -650,13 +650,13 @@
 		break;
 	}
 
-#if EFSYS_OPT_RX_SCATTER || EFSYS_OPT_RX_HDR_SPLIT
+#if EFSYS_OPT_RX_SCATTER
 	/* Report scatter and header/lookahead split buffer flags */
 	if (sop)
 		flags |= EFX_PKT_START;
 	if (jumbo_cont)
 		flags |= EFX_PKT_CONT;
-#endif	/* EFSYS_OPT_RX_SCATTER || EFSYS_OPT_RX_HDR_SPLIT */
+#endif	/* EFSYS_OPT_RX_SCATTER */
 
 	/* Detect errors included in the FSF_AZ_RX_EV_PKT_OK indication */
 	if (!ok) {
Index: head/sys/dev/sfxge/common/efx_impl.h
===================================================================
--- head/sys/dev/sfxge/common/efx_impl.h
+++ head/sys/dev/sfxge/common/efx_impl.h
@@ -157,10 +157,6 @@
 typedef struct efx_rx_ops_s {
 	efx_rc_t	(*erxo_init)(efx_nic_t *);
 	void		(*erxo_fini)(efx_nic_t *);
-#if EFSYS_OPT_RX_HDR_SPLIT
-	efx_rc_t	(*erxo_hdr_split_enable)(efx_nic_t *, unsigned int,
-						 unsigned int);
-#endif
 #if EFSYS_OPT_RX_SCATTER
 	efx_rc_t	(*erxo_scatter_enable)(efx_nic_t *, unsigned int);
 #endif
Index: head/sys/dev/sfxge/common/efx_rx.c
===================================================================
--- head/sys/dev/sfxge/common/efx_rx.c
+++ head/sys/dev/sfxge/common/efx_rx.c
@@ -48,14 +48,6 @@
 falconsiena_rx_fini(
 	__in		efx_nic_t *enp);
 
-#if EFSYS_OPT_RX_HDR_SPLIT
-static	__checkReturn	efx_rc_t
-falconsiena_rx_hdr_split_enable(
-	__in		efx_nic_t *enp,
-	__in		unsigned int hdr_buf_size,
-	__in		unsigned int pld_buf_size);
-#endif /* EFSYS_OPT_RX_HDR_SPLIT */
-
 #if EFSYS_OPT_RX_SCATTER
 static	__checkReturn	efx_rc_t
 falconsiena_rx_scatter_enable(
@@ -131,9 +123,6 @@
 static efx_rx_ops_t __efx_rx_falcon_ops = {
 	falconsiena_rx_init,			/* erxo_init */
 	falconsiena_rx_fini,			/* erxo_fini */
-#if EFSYS_OPT_RX_HDR_SPLIT
-	falconsiena_rx_hdr_split_enable,	/* erxo_hdr_split_enable */
-#endif
 #if EFSYS_OPT_RX_SCATTER
 	falconsiena_rx_scatter_enable,		/* erxo_scatter_enable */
 #endif
@@ -155,9 +144,6 @@
 static efx_rx_ops_t __efx_rx_siena_ops = {
 	falconsiena_rx_init,			/* erxo_init */
 	falconsiena_rx_fini,			/* erxo_fini */
-#if EFSYS_OPT_RX_HDR_SPLIT
-	falconsiena_rx_hdr_split_enable,	/* erxo_hdr_split_enable */
-#endif
 #if EFSYS_OPT_RX_SCATTER
 	falconsiena_rx_scatter_enable,		/* erxo_scatter_enable */
 #endif
@@ -179,9 +165,6 @@
 static efx_rx_ops_t __efx_rx_ef10_ops = {
 	ef10_rx_init,				/* erxo_init */
 	ef10_rx_fini,				/* erxo_fini */
-#if EFSYS_OPT_RX_HDR_SPLIT
-	ef10_rx_hdr_split_enable,		/* erxo_hdr_split_enable */
-#endif
 #if EFSYS_OPT_RX_SCATTER
 	ef10_rx_scatter_enable,			/* erxo_scatter_enable */
 #endif
@@ -289,32 +272,6 @@
 	enp->en_mod_flags &= ~EFX_MOD_RX;
 }
 
-#if EFSYS_OPT_RX_HDR_SPLIT
-	__checkReturn	efx_rc_t
-efx_rx_hdr_split_enable(
-	__in		efx_nic_t *enp,
-	__in		unsigned int hdr_buf_size,
-	__in		unsigned int pld_buf_size)
-{
-	efx_rx_ops_t *erxop = enp->en_erxop;
-	efx_rc_t rc;
-
-	EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
-	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX);
-	EFSYS_ASSERT3U(enp->en_family, >=, EFX_FAMILY_SIENA);
-
-	if ((rc = erxop->erxo_hdr_split_enable(enp, hdr_buf_size,
-	    pld_buf_size)) != 0)
-		goto fail1;
-
-	return (0);
-
-fail1:
-	EFSYS_PROBE1(fail1, efx_rc_t, rc);
-	return (rc);
-}
-#endif	/* EFSYS_OPT_RX_HDR_SPLIT */
-
 #if EFSYS_OPT_RX_SCATTER
 	__checkReturn	efx_rc_t
 efx_rx_scatter_enable(
@@ -722,60 +679,6 @@
 	return (0);
 }
 
-#if EFSYS_OPT_RX_HDR_SPLIT
-static	__checkReturn	efx_rc_t
-falconsiena_rx_hdr_split_enable(
-	__in		efx_nic_t *enp,
-	__in		unsigned int hdr_buf_size,
-	__in		unsigned int pld_buf_size)
-{
-	unsigned int nhdr32;
-	unsigned int npld32;
-	efx_oword_t oword;
-	efx_rc_t rc;
-
-	nhdr32 = hdr_buf_size / 32;
-	if ((nhdr32 == 0) ||
-	    (nhdr32 >= (1 << FRF_CZ_RX_HDR_SPLIT_HDR_BUF_SIZE_WIDTH)) ||
-	    ((hdr_buf_size % 32) != 0)) {
-		rc = EINVAL;
-		goto fail1;
-	}
-
-	npld32 = pld_buf_size / 32;
-	if ((npld32 == 0) ||
-	    (npld32 >= (1 << FRF_CZ_RX_HDR_SPLIT_PLD_BUF_SIZE_WIDTH)) ||
-	    ((pld_buf_size % 32) != 0)) {
-		rc = EINVAL;
-		goto fail2;
-	}
-
-	if (enp->en_rx_qcount > 0) {
-		rc = EBUSY;
-		goto fail3;
-	}
-
-	EFX_BAR_READO(enp, FR_AZ_RX_CFG_REG, &oword);
-
-	EFX_SET_OWORD_FIELD(oword, FRF_CZ_RX_HDR_SPLIT_EN, 1);
-	EFX_SET_OWORD_FIELD(oword, FRF_CZ_RX_HDR_SPLIT_HDR_BUF_SIZE, nhdr32);
-	EFX_SET_OWORD_FIELD(oword, FRF_CZ_RX_HDR_SPLIT_PLD_BUF_SIZE, npld32);
-
-	EFX_BAR_WRITEO(enp, FR_AZ_RX_CFG_REG, &oword);
-
-	return (0);
-
-fail3:
-	EFSYS_PROBE(fail3);
-fail2:
-	EFSYS_PROBE(fail2);
-fail1:
-	EFSYS_PROBE1(fail1, efx_rc_t, rc);
-
-	return (rc);
-}
-#endif	/* EFSYS_OPT_RX_HDR_SPLIT */
-
 #if EFSYS_OPT_RX_SCATTER
 static	__checkReturn	efx_rc_t
 falconsiena_rx_scatter_enable(
@@ -1279,26 +1182,6 @@
 		jumbo = B_FALSE;
 		break;
 
-#if EFSYS_OPT_RX_HDR_SPLIT
-	case EFX_RXQ_TYPE_SPLIT_HEADER:
-		if ((enp->en_family < EFX_FAMILY_SIENA) || ((index & 1) != 0)) {
-			rc = EINVAL;
-			goto fail4;
-		}
-		split = B_TRUE;
-		jumbo = B_TRUE;
-		break;
-
-	case EFX_RXQ_TYPE_SPLIT_PAYLOAD:
-		if ((enp->en_family < EFX_FAMILY_SIENA) || ((index & 1) == 0)) {
-			rc = EINVAL;
-			goto fail4;
-		}
-		split = B_FALSE;
-		jumbo = B_TRUE;
-		break;
-#endif	/* EFSYS_OPT_RX_HDR_SPLIT */
-
 #if EFSYS_OPT_RX_SCATTER
 	case EFX_RXQ_TYPE_SCATTER:
 		if (enp->en_family < EFX_FAMILY_SIENA) {
Index: head/sys/dev/sfxge/common/hunt_impl.h
===================================================================
--- head/sys/dev/sfxge/common/hunt_impl.h
+++ head/sys/dev/sfxge/common/hunt_impl.h
@@ -845,14 +845,6 @@
 ef10_rx_init(
 	__in		efx_nic_t *enp);
 
-#if EFSYS_OPT_RX_HDR_SPLIT
-extern	__checkReturn	efx_rc_t
-ef10_rx_hdr_split_enable(
-	__in		efx_nic_t *enp,
-	__in		unsigned int hdr_buf_size,
-	__in		unsigned int pld_buf_size);
-#endif	/* EFSYS_OPT_RX_HDR_SPLIT */
-
 #if EFSYS_OPT_RX_SCATTER
 extern	__checkReturn	efx_rc_t
 ef10_rx_scatter_enable(
Index: head/sys/dev/sfxge/common/hunt_rx.c
===================================================================
--- head/sys/dev/sfxge/common/hunt_rx.c
+++ head/sys/dev/sfxge/common/hunt_rx.c
@@ -466,32 +466,6 @@
 	return (0);
 }
 
-#if EFSYS_OPT_RX_HDR_SPLIT
-	__checkReturn	efx_rc_t
-ef10_rx_hdr_split_enable(
-	__in		efx_nic_t *enp,
-	__in		unsigned int hdr_buf_size,
-	__in		unsigned int pld_buf_size)
-{
-	efx_rc_t rc;
-
-	/* FIXME */
-	_NOTE(ARGUNUSED(enp, hdr_buf_size, pld_buf_size))
-	if (B_FALSE) {
-		rc = ENOTSUP;
-		goto fail1;
-	}
-	/* FIXME */
-
-	return (0);
-
-fail1:
-	EFSYS_PROBE1(fail1, efx_rc_t, rc);
-
-	return (rc);
-}
-#endif	/* EFSYS_OPT_RX_HDR_SPLIT */
-
 #if EFSYS_OPT_RX_SCATTER
 	__checkReturn	efx_rc_t
 ef10_rx_scatter_enable(